Debug the rs232 routines. This involved using two new segments, STARTUP

and NMI to make sure the NMI handler is loaded into the low 16K of memory
which are active when the control is passed from the ROM NMI stub to the
user handler.


git-svn-id: svn://svn.cc65.org/cc65/trunk@1086 b7a2c559-68d2-44c3-8de9-860c34a00d81
This commit is contained in:
cuz 2001-10-25 19:13:36 +00:00
parent c80c2049b6
commit 7e65f64c6a
3 changed files with 32 additions and 11 deletions

View File

@ -172,6 +172,7 @@ CIA2_CRB = $DD0F
; I/O: MMU
MMU_CR = $FF00
CC65_MMU_CFG = $0E ; Bank 0 with kernal ROM
; ---------------------------------------------------------------------------
; Super CPU

View File

@ -18,7 +18,6 @@
; ------------------------------------------------------------------------
; Constants
CC65_MMU_CFG = $0E ; Bank 0 with kernal ROM
IRQInd = $2FD ; JMP $0000 - used as indirect IRQ vector
; ------------------------------------------------------------------------
@ -45,9 +44,16 @@ tmp3: .res 1
tmp4: .res 1
regbank: .res 6 ; 6 byte register bank
zpspace = * - zpstart ; Zero page space allocated
zpspace = * - zpstart ; Zero page space allocated
.code
; Place the startup code in a special segment to cope with the quirks of
; c128 banking. Do also create an empty segment named "NMI" to avoid
; warnings if the rs232 routines are not used.
.segment "NMI"
; empty
.segment "STARTUP"
; ------------------------------------------------------------------------
; BASIC header with a SYS call

View File

@ -27,6 +27,8 @@
.export _rs232_init, _rs232_params, _rs232_done, _rs232_get
.export _rs232_put, _rs232_pause, _rs232_unpause, _rs232_status
.include "c128.inc"
NmiExit = $ff33 ;exit address for nmi
@ -120,7 +122,7 @@ _rs232_init:
;** check for super-cpu at 20 MHz
bit $d0bc
bit SCPU_Detect
bmi @L4
bit $d0b8
bvs @L4
@ -142,14 +144,14 @@ _rs232_init:
;** set up nmi's
lda $318
ldy $319
lda NMIVec
ldy NMIVec+1
sta NmiSave+0
sty NmiSave+1
lda #<NmiHandler
ldy #>NmiHandler
sta $318
sty $319
sta NMIVec
sty NMIVec+1
;** set default to 2400-8N1, enable interrupts
@ -313,8 +315,8 @@ _rs232_done:
lda NmiSave+0
ldy NmiSave+1
sta $318
sty $319
sta NMIVec
sty NMIVec+1
; Flag uninitialized
@ -530,8 +532,17 @@ _rs232_status:
; C64 @ 57.6k: 177 cycles avail, worstAvail=177-43? = 134
; SCPU @ 230.4k: 868 cycles avail: for a joke!
;
; Because of the C128 banking, the NMI handler must go into the non banked
; memory, since the ROM NMI entry point will switch to a configuration where
; only the lowest 16K of RAM are visible. We will place the NMI handler into
; it's own segment and map this segment into the lower 16K in the linker
; config.
.segment "NMI"
NmiHandler:
lda #CC65_MMU_CFG ;(2)
sta MMU_CR ;(4)
lda ACIA+RegStatus ;(4) ;status ;check for byte received
and #$08 ;(2)
beq @L9 ;(2*)
@ -553,7 +564,7 @@ NmiHandler:
; Assert flow control
@L2: lda RtsOff ;(3) ;assert flow control if buffer space too low
sta ACIA+RegCommand ;(4) ;command
sta ACIA+RegCommand ;(4) ;command
sta Stopped ;(3)
jmp NmiExit ;(3)
@ -569,6 +580,9 @@ NmiHandler:
@L4: jmp NmiExit
@L9: jmp NmiContinue
.code
;----------------------------------------------------------------------------
;