Tape interface upgrade - still missing housekeeping bits

This commit is contained in:
Anders Nielsen 2022-07-21 22:36:36 +03:00
parent f402c45a80
commit 86f91fd31a
9 changed files with 1006 additions and 195 deletions

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.gitignore vendored Normal file → Executable file
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#!/bin/bash
ca65 -vvv --cpu 6502 -l build/listing.txt -o build/abn6502rom.o abn6502rom.s
#!/bin/zsh
ca65 -vv --cpu 6502 -l build/listing.txt -o build/abn6502rom.o abn6502rom.s
ca65 crom.s -o build/crom.o
ca65 userland.s --cpu 65c02 -l build/userlisting.txt -o build/userland.o
ld65 -o build/abn6502rom.bin -C memmap.cfg "./build/abn6502rom.o" "./build/crom.o" "./build/userland.o"
minipro -s -p "SST39SF010A" -w build/abn6502rom.bin
#minipro -s -p "W27C512@DIP28" -w build/abn6502rom.bin
#The lines below are used to copy the output to a Raspberry Pi and load it
ssh openhabian@openhabiandevice.local killall bootload
scp build/userland.bin openhabian@openhabiandevice.local:./
ssh openhabian@openhabiandevice.local bootload -s userland.bin
ssh openhabian@openhabiandevice.local killall bootload

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hardware/6502.csv Normal file → Executable file
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hardware/6502.kicad_sch Normal file → Executable file
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hardware/6502.xml Normal file → Executable file
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hardware/fp-info-cache Normal file → Executable file
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MEMORY {
ZP: start = $0, size = $100, type = rw, define = yes;
KBRAM: start = $200, size = $100, define = yes;
RAM: start = $300, size = $1C00, file = "build/userland.bin";
KBRAM: start = $200, size = $200, define = yes;
RAM: start = $400, size = $1C00, file = "build/userland.bin";
ROM: start = $8000, size = $8000, file = %O;
CROM: start = $10000, size = $10000, file = "build/crom.bin";
}

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.feature string_escapes ; Allow c-style string escapes when using ca65
;PRIMM = $FFC8 ; Userland can use ROM subroutines if we tell them where they are. Check listing.txt for current subroutine addresses
;.require "abn6502rom.s"
.import scrp: zeropage, scwp: zeropage
.autoimport + ; Try to import anything unknown from other modules
PORTB = $6000 ; PB0: SCK/SCL, PB1: RF CS, PB2: RF CE, PB3: SDA, PB4,PB5: MISO ,PB6: PS/2 Clock In, PB7: MOSI/T1 Out (Tape drive output)
PORTA = $6001
DDRB = $6002
DDRA = $6003
T1CL = $6004
T1CH = $6005
T1LL = $6006
T1LH = $6007
T2CL = $6008
T2CH = $6009
SR1 = $600A
ACR = $600B ; [7] PB.7 T1 OUT, [6] T1 mode , [5] T2, [4:2] Shift register control, [1] PB Latch enable, [0] PA Latch Enable
PCR = $600C ; [7:5] CB2 Control, [4] CBl Control, [3:1] CA2 Control, [0] CAl Control
IFR = $600D ; [7:0] IRQ Tl T2 CBl CB2 SR CA1 CA2
IER = $600E ; [7:0] S/C Tl T2 CBl CB2 SR CA1 CA2
MILLIS = $40
SVP = $42 ; Save pointer
SVPH =$43
TMP = $50;
TMP2 = $51;
kb_wptr = $00
kb_rptr = $01
ESC_KEY = $1b
.segment "USERLAND"
userland:
lda #$0A
jsr printk
jsr PRIMM
.asciiz "Testing CPU...\n"
.asciiz "Testing CPU... \n"
cOhtwotest:
bra see02
jsr PRIMM
.asciiz "Hi! Im an NMOS 6502! \n"
.asciiz "Hi! Im an NMOS 6502! \n"
jmp exitnow
see02:
jsr PRIMM
.asciiz "Hi! Im a CMOS 65C02! \n"
.asciiz "Hi! Im a CMOS 65C02! \n\n"
exitnow:
jsr PRIMM
.asciiz "Program finished. Returning to main.\n"
brk
brk