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112 lines
6.2 KiB
Plaintext
112 lines
6.2 KiB
Plaintext
Intel Processor Microcode Package for Linux
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CPU microcode is a mechanism to correct certain errata in existing systems.
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The normal preferred method to apply microcode updates is using the system
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BIOS, but for a subset of Intel's processors this can be done at runtime
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using the operating system. This package contains those processors that
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support OS loading of microcode updates.
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The target user for this package are OS vendors such as Linux distributions
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for inclusion in their OS releases. Intel recommends getting the microcode
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using the OS vendor update mechanism. Expert users can of course update their
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microcode directly outside the OS vendor mechanism. This method is complex and
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thus could be error prone.
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Microcode is best loaded from the BIOS. Certain microcode must only be applied
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from the BIOS. Such processor microcode updates are never packaged in this
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package since they are not appropriate for OS distribution. An OEM may receive
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microcode packages that might be a superset of what is contained in this
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package.
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OS vendors may choose to also update microcode that kernel can consume for early
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loading. For e.g. Linux can update processor microcode very early in the kernel
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boot sequence. In situations when the BIOS update isn't available, early loading
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is the next best alternative to updating processor microcode. Microcode states
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are reset on a power reset, hence its required to be updated everytime during
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boot process.
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Loading microcode using the initrd method is recommended so that the microcode
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is loaded at the earliest time for best coverage. Systems that cannot tolerate
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downtime may use the late reload method to update a running system without a
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reboot.
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== About Processor Signature, Family, Model, Stepping and Platform ID ==
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Processor signature is a number identifying the model and version of a
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Intel processor. It can be obtained using the CPUID instruction, and can
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also be obtained via the command lscpu or from the content of /proc/cpuinfo.
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It's usually presented as 3 fields: Family, Model and Stepping
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(In the table of updates below, they are shorten as F, MO and S).
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The width of Family/Model/Stepping is 12/8/4bit, but when arranged in the
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32bit processor signature raw data is like 0FFM0FMS, hexadecimal.
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e.g. if a processor signature is 0x000906eb, it means
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Family=0x006, Model=0x9e and Stepping=0xb
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A processor product can be implemented for multiple types of platforms,
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So in MSR(17H), Intel processors have a 3bit Platform ID field,
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that can specify a platform type from at most 8 types.
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A microcode file for a specified processor model can support multiple
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platforms, so the Platform ID of a microcode (shorten as PI in the table)
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is a 8bit mask, each set bit indicates a platform type that it supports.
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One can find the platform ID on Linux using rdmsr from msr-tools.
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== Microcode update instructions ==
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-- intel-ucode/ --
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intel-ucode directory contains binary microcode files named in
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family-model-stepping pattern. The file is supported in most modern Linux
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distributions. It's generally located in the /lib/firmware directory,
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and can be updated through the microcode reload interface.
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To update early loading initrd, consult your distribution on how to package
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microcode files for early loading. Some distros use update-initramfs or dracut.
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As recommended above, please use the OS vendors are recommended method to ensure
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microcode file is updated for early loading before attempting the late-load
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procedure below.
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To update the intel-ucode package to the system, one need:
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1. Ensure the existence of /sys/devices/system/cpu/microcode/reload
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2. Copy intel-ucode directory to /lib/firmware, overwrite the files in
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/lib/firmware/intel-ucode/
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3. Write the reload interface to 1 to reload the microcode files, e.g.
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echo 1 > /sys/devices/system/cpu/microcode/reload
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If you are using the OS vendor method to update microcode, the above steps may
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have been done automatically during the update process.
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-- intel-ucode-with-caveats/ --
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This directory holds microcode that might need special handling.
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BDX-ML microcode is provided in directory, because it need special commits in
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the Linux kernel, otherwise, updating it might result in unexpected system
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behavior.
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OS vendors must ensure that the late loader patches (provided in
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linux-kernel-patches\) are included in the distribution before packaging the
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BDX-ML microcode for late-loading.
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== 20190312 Release ==
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-- Updates upon 20180807 release --
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Processor Identifier Version Products
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Model Stepping F-MO-S/PI Old->New
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---- new platforms ----------------------------------------
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AML-Y22 H0 6-8e-9/10 0000009e Core Gen8 Mobile
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WHL-U W0 6-8e-b/d0 000000a4 Core Gen8 Mobile
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WHL-U V0 6-8e-d/94 000000b2 Core Gen8 Mobile
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CFL-S P0 6-9e-c/22 000000a2 Core Gen9 Desktop
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CFL-H R0 6-9e-d/22 000000b0 Core Gen9 Mobile
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---- updated platforms ------------------------------------
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HSX-E/EP Cx/M1 6-3f-2/6f 0000003d->00000041 Core Gen4 X series; Xeon E5 v3
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HSX-EX E0 6-3f-4/80 00000012->00000013 Xeon E7 v3
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SKX-SP H0/M0/U0 6-55-4/b7 0200004d->0000005a Xeon Scalable
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SKX-D M1 6-55-4/b7 0200004d->0000005a Xeon D-21xx
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BDX-DE V1 6-56-2/10 00000017->00000019 Xeon D-1520/40
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BDX-DE V2/3 6-56-3/10 07000013->07000016 Xeon D-1518/19/21/27/28/31/33/37/41/48, Pentium D1507/08/09/17/19
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BDX-DE Y0 6-56-4/10 0f000012->0f000014 Xeon D-1557/59/67/71/77/81/87
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BDX-NS A0 6-56-5/10 0e00000a->0e00000c Xeon D-1513N/23/33/43/53
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APL D0 6-5c-9/03 00000032->00000036 Pentium N/J4xxx, Celeron N/J3xxx, Atom x5/7-E39xx
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APL E0 6-5c-a/03 0000000c->00000010 Atom x5/7-E39xx
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GLK B0 6-7a-1/01 00000028->0000002c Pentium Silver N/J5xxx, Celeron N/J4xxx
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KBL-U/Y H0 6-8e-9/c0 0000008e->0000009a Core Gen7 Mobile
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CFL-U43e D0 6-8e-a/c0 00000096->0000009e Core Gen8 Mobile
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KBL-H/S/E3 B0 6-9e-9/2a 0000008e->0000009a Core Gen7; Xeon E3 v6
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CFL-H/S/E3 U0 6-9e-a/22 00000096->000000aa Core Gen8 Desktop, Mobile, Xeon E
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CFL-S B0 6-9e-b/02 0000008e->000000aa Core Gen8
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