mirror of
https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files.git
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59 lines
2.1 KiB
Diff
59 lines
2.1 KiB
Diff
From 91df9fdf51492aec9fed6b4cbd33160886740f47 Mon Sep 17 00:00:00 2001
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From: Ashok Raj <ashok.raj@intel.com>
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Date: Wed, 28 Feb 2018 11:28:42 +0100
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Subject: x86/microcode/intel: Writeback and invalidate caches before updating
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microcode
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Updating microcode is less error prone when caches have been flushed and
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depending on what exactly the microcode is updating. For example, some
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of the issues around certain Broadwell parts can be addressed by doing a
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full cache flush.
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[ Borislav: Massage it and use native_wbinvd() in both cases. ]
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Signed-off-by: Ashok Raj <ashok.raj@intel.com>
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Signed-off-by: Borislav Petkov <bp@suse.de>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
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Tested-by: Ashok Raj <ashok.raj@intel.com>
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Cc: Arjan Van De Ven <arjan.van.de.ven@intel.com>
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Link: http://lkml.kernel.org/r/1519352533-15992-3-git-send-email-ashok.raj@intel.com
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Link: https://lkml.kernel.org/r/20180228102846.13447-4-bp@alien8.de
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---
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arch/x86/kernel/cpu/microcode/intel.c | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
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index 87bd6dc..e2864bc 100644
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--- a/arch/x86/kernel/cpu/microcode/intel.c
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+++ b/arch/x86/kernel/cpu/microcode/intel.c
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@@ -600,6 +600,12 @@ static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
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return UCODE_OK;
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}
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+ /*
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+ * Writeback and invalidate caches before updating microcode to avoid
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+ * internal issues depending on what the microcode is updating.
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+ */
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+ native_wbinvd();
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+
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/* write microcode via MSR 0x79 */
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native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
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@@ -816,6 +822,12 @@ static enum ucode_state apply_microcode_intel(int cpu)
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return UCODE_OK;
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}
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+ /*
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+ * Writeback and invalidate caches before updating microcode to avoid
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+ * internal issues depending on what the microcode is updating.
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+ */
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+ native_wbinvd();
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+
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/* write microcode via MSR 0x79 */
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wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
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--
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cgit v1.1
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