arduino-esp32/cores/esp32/esp32-hal-spi.c
Me No Dev 6f7a1ca76a
ESP-IDF v5.1 (#7733)
* Initial changes to compile under ESP-IDF v5.1

* Initial import for ESP-IDF v5.1 libs

* Update toolchain

* Update esp32-hal-psram.c

* Add missing LDs

* Update platform.txt

* Stop some CI jobs, because they will always fail

* Fix examples

* Update app_httpd.cpp

* Update ResetReason.ino

* Warnings fixes

* Added the example guideline and template (#7665)

* Added the example guideline and template

* PR review changes with some typos and grammar fixes

* Changes according to the PR review

* Added ESP32-S3 link to the datasheet (#7738)

* Update HiFreq_ADC.ino

* Replace periph_ctrl.h use because of deprecation

* Replace esp_spi_flash.h use because of deprecation

* Add includes to male mDNS::enableWorkstation compile

* Fix ssl_client mbedtls_pk_parse_key callback

* Update temperature sensor driver

* Allow sketch_utils to compile with arduino-cli

* Run CI with arduino-cli

* Fix arduino-cli CI build on Windows

* Refactor platform.txt to not use components installed through the board manager when running from git

* Initial Peripheral Manager Implementation

* Update SigmaDelta driver to use the new ESP-IDF driver API

* Small improvements to peripheral manager and SigmaDelta

* Remove deleted function from SigmaDelta header

* Update DAC driver to use the new ESP-IDF driver API

* Adds softAp(String) to make it compatible with ESP8266 (#7801)

* Fix commentary (#7800)

Minor fix based on observation done in https://github.com/espressif/arduino-esp32/issues/7795#issuecomment-1416868611

* add adafruit new board feather esp32s2 reserve tft (#7794)

* bugfix: add <stdint.h> for uint8_t to avoid compilation failure (GCC 11.2.0) (#7744)

* Adding 3rd party boards for VALTRACK-V4-VTS-ESP32-C3 & VALTRACK-V4-MFW-ESP32-C3 (#7735)

* Added VALTRACK-V4-VTS-ESP32-C3 board definition

Created pins_arduino.h & made changes to boards.txt with necessary changes

* Modified the URL

* Renamed json

* renamed all auRL

* Adding VALTRACK-V4 series board definitions

Added VALTRACK-V4-VTS-ESP32C3 & VALTRACK-V4-MFW-ESP32-C3 board variants

* Adding VALTRACK-V4 series board definitions

Added VALTRACK-V4-VTS-ESP32C3 & VALTRACK-V4-MFW-ESP32-C3 board variants

* Reverted package_esp32_index.template.json

restored package_esp32_index.template.json from edits

* Reverted package_esp32_index.template.json

Added new line to package_esp32_index.template.json

* Update Platformio CI (#7725)

* WiFiClient example fix (#7711)

* Modified WiFiClient example to use thingspeak instead of non-functionig sparkfun

* Moved instructions to README

* Fixed spelling

* Added link to S3 datasheet

---------

Co-authored-by: Jan Procházka <90197375+P-R-O-C-H-Y@users.noreply.github.com>

* Mirror update from Heltec repository (#7709)

Heltec updated the I2C pins in b10f4bf85d

* Fixes BLE data printing (#7699)

* Fixes BLE data printing

BLE data has no '\0' terminator, therefore it can't be printed as a regular C string.
This fix just prints the BLE data based on its length.

* Simplify printing to a single call

* split menu options + lora_32_V3 fix (#7697)

* Change header gaurd name (#7696)

* Fix Name (#7691)

Wrong name in definitions.

* Fix error in WiFiClient.cpp where the connect function fails for timeouts below 1 second (#7686)

* Update WiFiClient.cpp

This change will allow specifying connect timeouts below 1 second. Without this change, if connect timeouts under 1 second are given, the connect defaults to 0ms and fails. 
This will also allow timeouts in fractions of seconds, e.g. 1500ms. Without this change, connect timeouts are truncated to full second increments.

* Make parameter timeout_ms clear

* Change connection timeout_ms name for clarity

---------

Co-authored-by: Rodrigo Garcia <rodrigo.garcia@espressif.com>

* fixed the function header (#7674)

* fixed the function header

* fixed function name and paramaters

---------

Co-authored-by: Jan Procházka <90197375+P-R-O-C-H-Y@users.noreply.github.com>

* Ticker fix solving #6155 (#7664)

* Wrapped Ticker functions with #pragma disabling -Wcast-function-type

* Revert "Wrapped Ticker functions with #pragma disabling -Wcast-function-type"

This reverts commit 160be7e67a.

* Fixed Ticker example

* Modified Ticker example

* Fixed LED_BUILTIN err for ESP32

---------

Co-authored-by: Jan Procházka <90197375+P-R-O-C-H-Y@users.noreply.github.com>

* setPins fix ESP32 "specified pins are not supported by this chip." (#7646)

[ESP32: SDMMCFS::begin hardcodes the usage of slot 1, only check if the pins match slot 1 pins.]

setPins() was testing pins D1, D2 and D3 all against D1 ... fine in 1 pin mode when all are -1 not so much if you're trying to get 4 pin mode working.
I now see this function doesn't really do anything on the ESP32...accept now correctly checks that you are trying to use the slot 1 pins.

Co-authored-by: Jan Procházka <90197375+P-R-O-C-H-Y@users.noreply.github.com>

* Allow passing IP as connect method parameter in WiFiClientSecure and skip unnecessary host-ip conversions (#7643)

* Add LED_BUILTIN* definitions and initialization for LEDs to stop them floating. (#7636)

Co-authored-by: Rodrigo Garcia <rodrigo.garcia@espressif.com>

* Expand path to tinuf2 image when checking existence in platformio-build.py (#7631)

* Expand path to tinuf2 image when checking existence

* More isFiles fixed

* Remove (useless) trailing semicolon from Print.cpp (#7622)

* ADD: New variant Edgebox-ESP-100 (#7771)

* ADD: New variant Edgebox-ESP-100

* FIX: Edgebox-ESP-100 Board.txt usb mode option change back to default value as ESP32S3

* Add Crabik Slot ESP32-S3 board (#7790)

* Added Crabik Slot ESP32-S3

* Adding CPU frequency settings and removing excess from partition scheme settings

* new variant LilyGO T-Display-S3 (#7763)

* new variant LilyGO T-Display-S3

https://github.com/Xinyuan-LilyGO/T-Display-S3

* Add boards.txt definition

---------

Co-authored-by: Me No Dev <me-no-dev@users.noreply.github.com>

* Update get.py to support Apple ARM64

* Update package_esp32_index.template.json

* WString Return bool (#7774)

* Add Roboheart Hercules development board to the esp32-core (#7672)

* added Roboheart Hercules pin definitions and board.txt entries

* added package_roboheat.json for prototyping

* Roboheart Hercules pins

* Updated the pins

* Delete package_roboheart.json

* Requested changes

---------

Co-authored-by: renebohne <rene.bohne@gmail.com>

* Reword "ESP-IDF as Component" (#7812)

I think "Arduino as an ESP-IDF component" or just "As ESP-IDF component" instead of  "ESP-IDF as Component" is more correct way to name the link.

1. "ESP-IDF as Component" would imply that ESP-IDF is some sort of library for Arduino, which is (IMO) misleading, because it's true the other way around.
2. It's written as "Arduino as an ESP-IDF component" on the webpage it points to as well.

- Also I removed the capitalization from "Component" as I have not found a reason why is it capitalized.

* add new board Adafruit Feather ESP32-S3 Reverse TFT (#7811)

* Multi threading examples (tasks, queues, semaphores, mutexes) (#7660)

* Moved and renamed example ESP32/FreeRTOS to MultiThreading/BasicMultiThreading

* Added dummy files

* Modified original example

* Fixed BasicMultiThreading.ino

* Added Example demonstrating use of queues

* Extended info in BasicMultiThreading

* Renamed Queues to singular Queue

* Added Mutex example

* Added Semaphore example

* Moved info from example to README

* Moved doc from Mutex to README

* Added Queue README

* Removed unecesary text

* Fixed grammar

* Increased stack size for Sempahore example

* Added headers into .ino files

* Added word Example at the end of title in README

* removed unused line

* Added forgotten README

* Modified BasicMultiThreading example

* Added missing S3 entry in README

* moved location

* Update ESP-IDF libs

* Update CMakeLists.txt

* Update esptool to v4.4

* Add function timerAttachInterruptFlag (#7809)

* Update esptool to v4.5

* ADC refactoring (#7827)

* Adc refactored + periman implementation

Peripheral manager still needs to be checked if the implementation is right.

* switched to working solution for milivolts read

* Periman detachbus fix

* coding style

* fix CI warnings

* fix FreeRTOS example

* Update ETH.cpp

* Update FunctionalInterruptStruct.ino

* Update package_esp32_index.template.json

* Update package_esp32_index.template.json

* Fixes for the latest IDF v5.1

* update esp-idf libs and toolchain

* Turn OFF auto crystal frequency for ESP32 (needed by TWAI)

* Update examples

* Switch build to mostly use flags from files

Includes can not be done this way

* Reorganize flag files

* Optimize chip build flags further

* Revert defines from file. MBEDTLS_CONFIG_FILE does not properly expand

* Add support for includes and defines from file

* Replace old sdk path references in platform.txt

* use gcc-ar (#8013)

* Makes F_CPU generic for all SoC (#8007)

Based on CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ that is correctly defined in the sdkconfig file for each SoC.

* TIMER refactoring (#7904)

* refactor using GPtimer

* Updated timer HW test

* fix examples

* Add v2.0.7 in issue template (#7871)

* refactor using GPtimer

* Updated timer HW test

* fix examples

* Revert "Add v2.0.7 in issue template (#7871)"

This reverts commit fcc3b17d62.

* Update upload-artifact to v3 in HW CI

* Revert "Update upload-artifact to v3 in HW CI"

This reverts commit 1ba2280717.

* replace resolution with frequency

* remove count_down option

* countup removed from examples + header

* Refactored timer object

* code cleanup + examples and tests fixes

* TimerAlarm fix

---------

Co-authored-by: Vojtěch Bartoška <76958047+VojtechBartoska@users.noreply.github.com>

* [Docs] ADC and Timer API Update (+some docs fixes) (#7906)

* updated docs

* remove hall sensor docs

Removed Hall sensor documentation as its no longer supported in IDF-5

* Fixed ESPNow examples location in docs

* Last timer refactored API + gpio small fix

* AlarmWrite fix

* Fixes APLL/PLL with RTC Frequency (#8025)

log_d() was displaying APLL for any SoC, but S3 and C3 has not such option, causing compilation errors.

* Update IDF libs and fix OPI PSRAM on S3

* Add setMode function HardwareSerial.c to set the esp32 uart mode for use with RS485 auto RTS (#7935)

* Added setMode function to set the esp32 uart mode

Used to set the esp32 uart mode for use with RS485 Half Duplex and the auto RTS pin mode. This will set/clear the RTS pin output to control the RE/DE pin on most RS485 chips.

* Add Success (bool) return in some functions

* Add Success (bool) return code to some functions

* Add Success (bool) return to some functions

* Add Success (bool) return to some functions

* Fix uartSetRxTimeout return type

---------

Co-authored-by: Rodrigo Garcia <rodrigo.garcia@espressif.com>

* Add support for esp-elf-gdb

* WFG Crashfix (#8044)

* Update component libs

* IDF release/v5.1 (#8061)

* IDF release/v5.1 bb9200acec

* Update Esp.cpp

* IDF release/v5.1 420ebd208a

* Update esp32-hal-psram.c

* Switch SDK to be an external package

* fix path (#8096)

* Makes UART work at any APB Frequency (#8097)

Fixes HardwareSerial to work with IDF 5.1 on any CPU/APB Frequency (240MHz to 10MHZ), including user created low power modes.

* Add required callbacks for TinyUSB DFU

* Update version to 3.0.0

* Add ESP.getCoreVersion() and update ESP.getChipModel()

* Update timer hal for the latest 5.1

* Use separate RX and TX buffer sizes in HTTP client

optimizes download by allowing up to 4K packets to be received

* Rename clock tree enum name in latest 5.1

* ESP32-H4 support was removed in ESP-IDF v5.1

* IDF release/v5.1 2004bf4e11 (#8165)

* Deinit previous bus first (#8180)

* TIMER - add timer_started flag, fix timerEnd() + timer HW test (#8135)

* Add timer_started flag and stop before disable

* Fix timer HW test

* TOUCH - Peripheral manager implementation (#8129)

* Touch periman implemented

* Deinit previous bus first

* LEDC Refactoring - Peripheral manager implemented (#8126)

* LEDC periman implementation

* Fix examples

* Rework tone

* Update ledc docs

* fix missing bracket

* Update analog funtions esp32-hal.h

* Update CameraWebServer example

* Fix HiFreq_ADC example

* minor fixes - typos

* Avoid calling tone/notone when tone already runs on dif. pin

* Remove unused channels_resolution

* GPIO - Peripheral manager implementation (#8179)

* periman-implementation

* fix RGB_BUILTIN and remove space

* Enforces more consistency into Peripheral Manager (#8188)

* Avoid log_i() message the first time a bus is assigned

* Prevent operation with ESP32_BUS_TYPE_INIT

* keeps coding style

* do not print messages on INIT bus type

* [Arduino Core 3.0.0] RMT IDF5.1 Refactoring (#7994)

* RMT IDF5.1 refactoring

* Fixes initial value setting

* removed rmtRead() with user callback

* simplify/remove Read data structure

* Deep API simplification

* fixes the examples

* fix rmt.h

* adds support to APB different frequencies

* fixes CI and not defined RGB_BUILTIN

* new RMT API and examples

* fixing commentaties

* Update esp32-hal-rgb-led.c

* changes Filter API

* Fixes example with Filter API

* Update PlatformIO scripts for the upcoming 3.0 core (#8183)

* Update PlatformIO scripts for the upcoming 3.0 core

* Dynamically select proper framework-arduinoespressif32-libs package

With this change the dev-platform will be dynamically configured to
pull the latest .zip package with precompiled libraries from extracted from
package_esp32_index.template.json

* free memory on detach (#8264)

* SPI - Peripheral manager implementation  (#8255)

* spi periman implementation

* fix header file

* remove unused struct

* fix missing braces

* Update esp32-hal-rmt.c (#8216)

Optimizing Peripheral Manager Test

* I2C - Peripheral manager implementation (#8220)

* i2c-master periman initial commit

* i2c-master make detachbus static + comment remove

* i2c-slave periman implementation

* SetPinBus to INIT on i2cDeinits

* Fix slave pins deinit

* remove dbg logs

* set ret to ESP_FAIL instead of returning

* Fix warnings in hal-spi caused by pariman transition

* Update esptool.py to version 4.6

* Add platform support for ESP_SR

* Add USB Type and valid pin check to periman

* replace bus with spi->num+1 (#8279)

* Remove default pins from SPI HAL

* Add commented out handlers for esptool.js in TinyUSB CDC

For future use

* Add build defines for host os and fqbn (for debug purposes)

* Provide proper memory caps total size

* Update Esp.cpp

* SDMMC - Peripheral manager implementation (#8289)

* sdmmc periman implemented

* save pins when SOC_SDMMC_USE_IOMUX

* IDF release/v5.1 4bc762621d (#8292)

* Adds missing pinMode (#8312)

* Adds missing pinMode

The example code lacks a pinMode() to initialize the GPIO 0 (button). In Arduino Core 3.0.0, it prints an error message when trying to read a not initialized GPIO.

* Update KeyboardLogout.ino

Adds <buttonPin> to keep code standard

* Update KeyboardReprogram.ino

Adds <buttonPin> to keep code standard

* LEDC Fade implementation (#8338)

* fade API + pointer fixes

* Add fade api

* Add fade example

* update ledc docs

* remove unused variables

* fix path to example

* Adds USB to Peripheral Manager - Arduino Core 3.0.0 (#8335)

* ETHERNET - Peripheral manager implementation (#8297)

* Peripheral manager implemented

* remove unused variable

* Add all RMII pins

* fix typo

* Adds HardwareSerial to Peripheral Manager Arduino 3.0.0 (#8328)

* Do not limit ETHERNET in periman to only ESP32. SPI is also an option

* Initial support for ESP32-C6 (#8337)

* Add checks for SOC defines (#8351)

* Add checks for SOC defines

* Add SoC checks to BLE library

* fix i2c compilation error

* fix wrong placement of include

* add check to SPI library

* add check to USB library

* add checks to Wire library

* Feature/esp32h2 support (#8373)

* Initial support for ESP32H2

* Additional changes for ESP32H2

* Update libs for ESP32H2

* Fix flashing on ESP32-H2

* Fix GPIO Configs for ESP32-C6 and ESP32-H2

* Update Timer test sketch

* Fix upload flash parameters

* Use ets_write_char_uart instead of ets_printf in log_printfv

* Print full chip report when log level is sufficient (#8282)

* ESP32-C3 does not have ets_write_char_uart

* Fix BLE gap event name

* HW Testing - Pytest update (#8389)

* update tests requirements

* remove already handled components

* Update version of pytest

* Add missing ESP32-H2 to hil.yml

* Updated FreeRTOS names (#8418)

* HW Testing -  ESP32-C6 + ESP32-H2 fixes (#8404)

* add C6/H2 to tests cfg.json

* remove ,

* workflow runs-on runner by matrix

* Add need for arduino tag to select runner

* Add cryptography to requirements.txt

* Removed duplicate TX1 define for H2 (#8402)

* Fix broken examples

* Fixes RMT filter & idle timing and setup (#8359)

* Fixes Filter and Idle parameter to uint32

* Fixes Filter and Idle setup

* Fixes it to 5.1Libs branch

* fix RMT CLK source and Filter API

* fixes missing ;

* fixes missing ;

* fixes RMT example

* IDF release/v5.1 a7b62bbcaf (#8438)

* Add workflow to build executables from python scripts (#8290)

* Add workflow to build executables from python scripts

* Push binary to tools

* Enable executable signing on Windows

* Update get.py

* Push binary to tools

* Try with multiple files

* Try more actions

* Try powershell

* Restore tools so they do not get rebuilt

* Finalize scripts

* Push binary to tools

* App rollback should be after PSRAM is initialized

* Correcting RX1 to GPIO4 and TX1 to GPIO5 to be consistent with documentation. Previous pin use works but is inconsistent with C6 docs.

* Fixes Memory Leak (#8486)

* fixes preprocessor test (#8485)

* fixes preprocessor test

When using `#define USE_SOFT_AP` 
Change
`&& not USE_SOFT_AP` ==> `&& !defined(USE_SOFT_AP)`

* Adds any BLE capable device in WiFiProv.ino

Removing ESP32 restriction for BLE Provisioning.

* fix flash mode read out for C6

* Add option for custom partitions without restrictions

* SD_MMC update (#8298)

* Updated SD_MMC lib and examples

* Removed getter implementation and commented usage in examples

* squashed updates

* IDF release/v5.1 f0437b945f (#8599)

* Update package_esp32_index.template.json

* Fix printf format build error in BTAdvertisedDeviceSet.cpp

---------

Co-authored-by: Pedro Minatel <pedro.minatel@espressif.com>
Co-authored-by: Rodrigo Garcia <rodrigo.garcia@espressif.com>
Co-authored-by: Ha Thach <thach@tinyusb.org>
Co-authored-by: Martin Turski <quiret@vfemail.net>
Co-authored-by: raviypujar <raviypujar@gmail.com>
Co-authored-by: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Co-authored-by: Tomáš Pilný <34927466+PilnyTomas@users.noreply.github.com>
Co-authored-by: Jan Procházka <90197375+P-R-O-C-H-Y@users.noreply.github.com>
Co-authored-by: Daniel Berlin <dberlin@dberlin.org>
Co-authored-by: Nima Askari (نیما عسکری) <nimaltd@yahoo.com>
Co-authored-by: rtpmsys <106180646+rtpmsys@users.noreply.github.com>
Co-authored-by: bytiful <55647551+bytiful@users.noreply.github.com>
Co-authored-by: tmfarrington <tmfarrington@users.noreply.github.com>
Co-authored-by: Krzysiek S <chris.streh@gmail.com>
Co-authored-by: surt <carl.olsson@gmail.com>
Co-authored-by: Max Scheffler <max.scheffler@pm.me>
Co-authored-by: Clemens Kirchgatterer <clemens@1541.org>
Co-authored-by: Peter Pan's Techland <twinkle-pirate@hotmail.com>
Co-authored-by: Roman <programmeofficemilkyway@gmail.com>
Co-authored-by: Eistee <Eistee82@users.noreply.github.com>
Co-authored-by: David McCurley <44048235+mrengineer7777@users.noreply.github.com>
Co-authored-by: Gaya3N25 <30388176+Gaya3N25@users.noreply.github.com>
Co-authored-by: renebohne <rene.bohne@gmail.com>
Co-authored-by: Olivér Remény <25034625+remenyo@users.noreply.github.com>
Co-authored-by: davidk88 <david.kotar@gmail.com>
Co-authored-by: Vojtěch Bartoška <76958047+VojtechBartoska@users.noreply.github.com>
Co-authored-by: James Armstrong <jamesarmstrong3@me.com>
Co-authored-by: Valerii Koval <valeros@users.noreply.github.com>
Co-authored-by: Peter G. Jensen <root@petergjoel.dk>
2023-10-05 14:54:25 +03:00

1577 lines
47 KiB
C

// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "esp32-hal-spi.h"
#if SOC_GPSPI_SUPPORTED
#include "esp32-hal.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "esp_attr.h"
#include "soc/spi_reg.h"
#include "soc/spi_struct.h"
#include "soc/io_mux_reg.h"
#include "soc/gpio_sig_map.h"
#include "soc/rtc.h"
#include "hal/clk_gate_ll.h"
#include "esp32-hal-periman.h"
#include "esp_system.h"
#include "esp_intr_alloc.h"
#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
#include "soc/dport_reg.h"
#include "esp32/rom/ets_sys.h"
#include "esp32/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "soc/dport_reg.h"
#include "esp32s2/rom/ets_sys.h"
#include "esp32s2/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "soc/dport_reg.h"
#include "esp32s3/rom/ets_sys.h"
#include "esp32s3/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/ets_sys.h"
#include "esp32c3/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/ets_sys.h"
#include "esp32c6/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/ets_sys.h"
#include "esp32h2/rom/gpio.h"
#else
#error Target CONFIG_IDF_TARGET is not supported
#endif
struct spi_struct_t {
spi_dev_t * dev;
#if !CONFIG_DISABLE_HAL_LOCKS
SemaphoreHandle_t lock;
#endif
uint8_t num;
int8_t sck;
int8_t miso;
int8_t mosi;
int8_t ss;
};
#if CONFIG_IDF_TARGET_ESP32S2
// ESP32S2
#define SPI_COUNT (3)
#define SPI_CLK_IDX(p) ((p==0)?SPICLK_OUT_MUX_IDX:((p==1)?FSPICLK_OUT_MUX_IDX:((p==2)?SPI3_CLK_OUT_MUX_IDX:0)))
#define SPI_MISO_IDX(p) ((p==0)?SPIQ_OUT_IDX:((p==1)?FSPIQ_OUT_IDX:((p==2)?SPI3_Q_OUT_IDX:0)))
#define SPI_MOSI_IDX(p) ((p==0)?SPID_IN_IDX:((p==1)?FSPID_IN_IDX:((p==2)?SPI3_D_IN_IDX:0)))
#define SPI_SPI_SS_IDX(n) ((n==0)?SPICS0_OUT_IDX:((n==1)?SPICS1_OUT_IDX:0))
#define SPI_HSPI_SS_IDX(n) ((n==0)?SPI3_CS0_OUT_IDX:((n==1)?SPI3_CS1_OUT_IDX:((n==2)?SPI3_CS2_OUT_IDX:SPI3_CS0_OUT_IDX)))
#define SPI_FSPI_SS_IDX(n) ((n==0)?FSPICS0_OUT_IDX:((n==1)?FSPICS1_OUT_IDX:((n==2)?FSPICS2_OUT_IDX:FSPICS0_OUT_IDX)))
#define SPI_SS_IDX(p, n) ((p==0)?SPI_SPI_SS_IDX(n):((p==1)?SPI_SPI_SS_IDX(n):((p==2)?SPI_HSPI_SS_IDX(n):0)))
#elif CONFIG_IDF_TARGET_ESP32S3
// ESP32S3
#define SPI_COUNT (2)
#define SPI_CLK_IDX(p) ((p==0)?FSPICLK_OUT_IDX:((p==1)?SPI3_CLK_OUT_IDX:0))
#define SPI_MISO_IDX(p) ((p==0)?FSPIQ_OUT_IDX:((p==1)?SPI3_Q_OUT_IDX:0))
#define SPI_MOSI_IDX(p) ((p==0)?FSPID_IN_IDX:((p==1)?SPI3_D_IN_IDX:0))
#define SPI_HSPI_SS_IDX(n) ((n==0)?SPI3_CS0_OUT_IDX:((n==1)?SPI3_CS1_OUT_IDX:0))
#define SPI_FSPI_SS_IDX(n) ((n==0)?FSPICS0_OUT_IDX:((n==1)?FSPICS1_OUT_IDX:0))
#define SPI_SS_IDX(p, n) ((p==0)?SPI_FSPI_SS_IDX(n):((p==1)?SPI_HSPI_SS_IDX(n):0))
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
// ESP32C3
#define SPI_COUNT (1)
#define SPI_CLK_IDX(p) FSPICLK_OUT_IDX
#define SPI_MISO_IDX(p) FSPIQ_OUT_IDX
#define SPI_MOSI_IDX(p) FSPID_IN_IDX
#define SPI_SPI_SS_IDX(n) ((n==0)?FSPICS0_OUT_IDX:((n==1)?FSPICS1_OUT_IDX:((n==2)?FSPICS2_OUT_IDX:FSPICS0_OUT_IDX)))
#define SPI_SS_IDX(p, n) SPI_SPI_SS_IDX(n)
#else
// ESP32
#define SPI_COUNT (4)
#define SPI_CLK_IDX(p) ((p==0)?SPICLK_OUT_IDX:((p==1)?SPICLK_OUT_IDX:((p==2)?HSPICLK_OUT_IDX:((p==3)?VSPICLK_OUT_IDX:0))))
#define SPI_MISO_IDX(p) ((p==0)?SPIQ_OUT_IDX:((p==1)?SPIQ_OUT_IDX:((p==2)?HSPIQ_OUT_IDX:((p==3)?VSPIQ_OUT_IDX:0))))
#define SPI_MOSI_IDX(p) ((p==0)?SPID_IN_IDX:((p==1)?SPID_IN_IDX:((p==2)?HSPID_IN_IDX:((p==3)?VSPID_IN_IDX:0))))
#define SPI_SPI_SS_IDX(n) ((n==0)?SPICS0_OUT_IDX:((n==1)?SPICS1_OUT_IDX:((n==2)?SPICS2_OUT_IDX:SPICS0_OUT_IDX)))
#define SPI_HSPI_SS_IDX(n) ((n==0)?HSPICS0_OUT_IDX:((n==1)?HSPICS1_OUT_IDX:((n==2)?HSPICS2_OUT_IDX:HSPICS0_OUT_IDX)))
#define SPI_VSPI_SS_IDX(n) ((n==0)?VSPICS0_OUT_IDX:((n==1)?VSPICS1_OUT_IDX:((n==2)?VSPICS2_OUT_IDX:VSPICS0_OUT_IDX)))
#define SPI_SS_IDX(p, n) ((p==0)?SPI_SPI_SS_IDX(n):((p==1)?SPI_SPI_SS_IDX(n):((p==2)?SPI_HSPI_SS_IDX(n):((p==3)?SPI_VSPI_SS_IDX(n):0))))
#endif
#if CONFIG_DISABLE_HAL_LOCKS
#define SPI_MUTEX_LOCK()
#define SPI_MUTEX_UNLOCK()
static spi_t _spi_bus_array[] = {
#if CONFIG_IDF_TARGET_ESP32S2
{(volatile spi_dev_t *)(DR_REG_SPI1_BASE), 0, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 1, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 2, -1, -1, -1, -1}
#elif CONFIG_IDF_TARGET_ESP32S3
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 1, -1, -1, -1, -1}
#elif CONFIG_IDF_TARGET_ESP32C3
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1}
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
{(spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1}
#else
{(volatile spi_dev_t *)(DR_REG_SPI0_BASE), 0, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI1_BASE), 1, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 2, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 3, -1, -1, -1, -1}
#endif
};
#else
#define SPI_MUTEX_LOCK() do {} while (xSemaphoreTake(spi->lock, portMAX_DELAY) != pdPASS)
#define SPI_MUTEX_UNLOCK() xSemaphoreGive(spi->lock)
static spi_t _spi_bus_array[] = {
#if CONFIG_IDF_TARGET_ESP32S2
{(volatile spi_dev_t *)(DR_REG_SPI1_BASE), NULL, 0, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 1, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 2, -1, -1, -1, -1}
#elif CONFIG_IDF_TARGET_ESP32S3
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 1, -1, -1, -1, -1}
#elif CONFIG_IDF_TARGET_ESP32C3
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1}
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
{(spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1}
#else
{(volatile spi_dev_t *)(DR_REG_SPI0_BASE), NULL, 0, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI1_BASE), NULL, 1, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 2, -1, -1, -1, -1},
{(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 3, -1, -1, -1, -1}
#endif
};
#endif
static bool spiDetachBus(void * bus){
uint8_t spi_num = (int)bus - 1;
spi_t * spi = &_spi_bus_array[spi_num];
if(spi->dev->clock.val != 0){
log_d("Stopping SPI BUS");
spiStopBus(spi);
}
if(spi->sck != -1){
log_d("SPI detach SCK pin %d",spi->sck);
spiDetachSCK(spi,spi->sck);
}
if(spi->miso != -1){
log_d("SPI detach MISO pin %d",spi->miso);
spiDetachMISO(spi,spi->miso);
}
if(spi->mosi != -1){
log_d("SPI detach MOSI pin %d",spi->mosi);
spiDetachMOSI(spi,spi->mosi);
}
if(spi->ss != -1){
log_d("SPI detach SS pin %d",spi->ss);
spiDetachSS(spi,spi->ss);
}
//set SPI to NULL, as all pins are already detached
if(spi->sck == -1 && spi->miso == -1 && spi->mosi == -1 && spi->ss == -1){
log_d("Set spi handle to NULL");
spi = NULL;
return true;
}
return false;
}
bool spiAttachSCK(spi_t * spi, int8_t sck)
{
if(!spi || sck < 0) {
return false;
}
void * bus = perimanGetPinBus(sck, ESP32_BUS_TYPE_SPI_MASTER);
if(bus != NULL && !perimanSetPinBus(sck, ESP32_BUS_TYPE_INIT, NULL)){
return false;
}
pinMode(sck, OUTPUT);
pinMatrixOutAttach(sck, SPI_CLK_IDX(spi->num), false, false);
spi->sck = sck;
if(!perimanSetPinBus(sck, ESP32_BUS_TYPE_SPI_MASTER, (void *)(spi->num+1))){
spiDetachBus((void *)(spi->num+1));
log_e("Failed to set pin bus to SPI for pin %d", sck);
return false;
}
return true;
}
bool spiAttachMISO(spi_t * spi, int8_t miso)
{
if(!spi || miso < 0) {
return false;
}
void * bus = perimanGetPinBus(miso, ESP32_BUS_TYPE_SPI_MASTER);
if(bus != NULL && !perimanSetPinBus(miso, ESP32_BUS_TYPE_INIT, NULL)){
return false;
}
SPI_MUTEX_LOCK();
pinMode(miso, INPUT);
pinMatrixInAttach(miso, SPI_MISO_IDX(spi->num), false);
spi->miso = miso;
SPI_MUTEX_UNLOCK();
if(!perimanSetPinBus(miso, ESP32_BUS_TYPE_SPI_MASTER, (void *)(spi->num+1))){
spiDetachBus((void *)(spi->num+1));
log_e("Failed to set pin bus to SPI for pin %d", miso);
return false;
}
return true;
}
bool spiAttachMOSI(spi_t * spi, int8_t mosi)
{
if(!spi || mosi < 0) {
return false;
}
void * bus = perimanGetPinBus(mosi, ESP32_BUS_TYPE_SPI_MASTER);
if(bus != NULL && !perimanSetPinBus(mosi, ESP32_BUS_TYPE_INIT, NULL)){
return false;
}
pinMode(mosi, OUTPUT);
pinMatrixOutAttach(mosi, SPI_MOSI_IDX(spi->num), false, false);
spi->mosi = mosi;
if(!perimanSetPinBus(mosi, ESP32_BUS_TYPE_SPI_MASTER, (void *)(spi->num+1))){
spiDetachBus((void *)(spi->num+1));
log_e("Failed to set pin bus to SPI for pin %d", mosi);
return false;
}
return true;
}
bool spiDetachSCK(spi_t * spi, int8_t sck)
{
if(!spi || sck < 0) {
return false;
}
pinMatrixOutDetach(sck, false, false);
spi->sck = -1;
perimanSetPinBus(sck, ESP32_BUS_TYPE_INIT, NULL);
return true;
}
bool spiDetachMISO(spi_t * spi, int8_t miso)
{
if(!spi || miso < 0) {
return false;
}
pinMatrixInDetach(SPI_MISO_IDX(spi->num), false, false);
spi->miso = -1;
perimanSetPinBus(miso, ESP32_BUS_TYPE_INIT, NULL);
return true;
}
bool spiDetachMOSI(spi_t * spi, int8_t mosi)
{
if(!spi || mosi < 0) {
return false;
}
pinMatrixOutDetach(mosi, false, false);
spi->mosi = -1;
perimanSetPinBus(mosi, ESP32_BUS_TYPE_INIT, NULL);
return true;
}
bool spiAttachSS(spi_t * spi, uint8_t cs_num, int8_t ss)
{
if(!spi || ss < 0 || cs_num > 2) {
return false;
}
void * bus = perimanGetPinBus(ss, ESP32_BUS_TYPE_SPI_MASTER);
if(bus != NULL && !perimanSetPinBus(ss, ESP32_BUS_TYPE_INIT, NULL)){
return false;
}
pinMode(ss, OUTPUT);
pinMatrixOutAttach(ss, SPI_SS_IDX(spi->num, cs_num), false, false);
spiEnableSSPins(spi, (1 << cs_num));
spi->ss = ss;
if(!perimanSetPinBus(ss, ESP32_BUS_TYPE_SPI_MASTER, (void *)(spi->num+1))){
spiDetachBus((void *)(spi->num+1));
log_e("Failed to set pin bus to SPI for pin %d", ss);
return false;
}
return true;
}
bool spiDetachSS(spi_t * spi, int8_t ss)
{
if(!spi || ss < 0) {
return false;
}
pinMatrixOutDetach(ss, false, false);
spi->ss = -1;
perimanSetPinBus(ss, ESP32_BUS_TYPE_INIT, NULL);
return true;
}
void spiEnableSSPins(spi_t * spi, uint8_t cs_mask)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.val &= ~(cs_mask & SPI_CS_MASK_ALL);
#else
spi->dev->pin.val &= ~(cs_mask & SPI_CS_MASK_ALL);
#endif
SPI_MUTEX_UNLOCK();
}
void spiDisableSSPins(spi_t * spi, uint8_t cs_mask)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.val |= (cs_mask & SPI_CS_MASK_ALL);
#else
spi->dev->pin.val |= (cs_mask & SPI_CS_MASK_ALL);
#endif
SPI_MUTEX_UNLOCK();
}
void spiSSEnable(spi_t * spi)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
spi->dev->user.cs_setup = 1;
spi->dev->user.cs_hold = 1;
SPI_MUTEX_UNLOCK();
}
void spiSSDisable(spi_t * spi)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
spi->dev->user.cs_setup = 0;
spi->dev->user.cs_hold = 0;
SPI_MUTEX_UNLOCK();
}
void spiSSSet(spi_t * spi)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.cs_keep_active = 1;
#else
spi->dev->pin.cs_keep_active = 1;
#endif
SPI_MUTEX_UNLOCK();
}
void spiSSClear(spi_t * spi)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.cs_keep_active = 0;
#else
spi->dev->pin.cs_keep_active = 0;
#endif
SPI_MUTEX_UNLOCK();
}
uint32_t spiGetClockDiv(spi_t * spi)
{
if(!spi) {
return 0;
}
return spi->dev->clock.val;
}
void spiSetClockDiv(spi_t * spi, uint32_t clockDiv)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
spi->dev->clock.val = clockDiv;
SPI_MUTEX_UNLOCK();
}
uint8_t spiGetDataMode(spi_t * spi)
{
if(!spi) {
return 0;
}
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
bool idleEdge = spi->dev->misc.ck_idle_edge;
#else
bool idleEdge = spi->dev->pin.ck_idle_edge;
#endif
bool outEdge = spi->dev->user.ck_out_edge;
if(idleEdge) {
if(outEdge) {
return SPI_MODE2;
}
return SPI_MODE3;
}
if(outEdge) {
return SPI_MODE1;
}
return SPI_MODE0;
}
void spiSetDataMode(spi_t * spi, uint8_t dataMode)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
switch (dataMode) {
case SPI_MODE1:
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.ck_idle_edge = 0;
#else
spi->dev->pin.ck_idle_edge = 0;
#endif
spi->dev->user.ck_out_edge = 1;
break;
case SPI_MODE2:
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.ck_idle_edge = 1;
#else
spi->dev->pin.ck_idle_edge = 1;
#endif
spi->dev->user.ck_out_edge = 1;
break;
case SPI_MODE3:
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.ck_idle_edge = 1;
#else
spi->dev->pin.ck_idle_edge = 1;
#endif
spi->dev->user.ck_out_edge = 0;
break;
case SPI_MODE0:
default:
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.ck_idle_edge = 0;
#else
spi->dev->pin.ck_idle_edge = 0;
#endif
spi->dev->user.ck_out_edge = 0;
break;
}
SPI_MUTEX_UNLOCK();
}
uint8_t spiGetBitOrder(spi_t * spi)
{
if(!spi) {
return 0;
}
return (spi->dev->ctrl.wr_bit_order | spi->dev->ctrl.rd_bit_order) == 0;
}
void spiSetBitOrder(spi_t * spi, uint8_t bitOrder)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
if (SPI_MSBFIRST == bitOrder) {
spi->dev->ctrl.wr_bit_order = 0;
spi->dev->ctrl.rd_bit_order = 0;
} else if (SPI_LSBFIRST == bitOrder) {
spi->dev->ctrl.wr_bit_order = 1;
spi->dev->ctrl.rd_bit_order = 1;
}
SPI_MUTEX_UNLOCK();
}
static void _on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb, uint32_t new_apb)
{
spi_t * spi = (spi_t *)arg;
if(ev_type == APB_BEFORE_CHANGE){
SPI_MUTEX_LOCK();
while(spi->dev->cmd.usr);
} else {
spi->dev->clock.val = spiFrequencyToClockDiv(old_apb / ((spi->dev->clock.clkdiv_pre + 1) * (spi->dev->clock.clkcnt_n + 1)));
SPI_MUTEX_UNLOCK();
}
}
static void spiInitBus(spi_t * spi)
{
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->slave.trans_done = 0;
#endif
spi->dev->slave.val = 0;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.val = 0;
#else
spi->dev->pin.val = 0;
#endif
spi->dev->user.val = 0;
spi->dev->user1.val = 0;
spi->dev->ctrl.val = 0;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->ctrl1.val = 0;
spi->dev->ctrl2.val = 0;
#else
spi->dev->clk_gate.val = 0;
spi->dev->dma_conf.val = 0;
spi->dev->dma_conf.rx_afifo_rst = 1;
spi->dev->dma_conf.buf_afifo_rst = 1;
#endif
spi->dev->clock.val = 0;
}
void spiStopBus(spi_t * spi)
{
if(!spi) {
return;
}
removeApbChangeCallback(spi, _on_apb_change);
SPI_MUTEX_LOCK();
spiInitBus(spi);
SPI_MUTEX_UNLOCK();
}
spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_t bitOrder)
{
if(spi_num >= SPI_COUNT){
return NULL;
}
perimanSetBusDeinit(ESP32_BUS_TYPE_SPI_MASTER, spiDetachBus);
spi_t * spi = &_spi_bus_array[spi_num];
#if !CONFIG_DISABLE_HAL_LOCKS
if(spi->lock == NULL){
spi->lock = xSemaphoreCreateMutex();
if(spi->lock == NULL) {
return NULL;
}
}
#endif
#if CONFIG_IDF_TARGET_ESP32S2
if(spi_num == FSPI) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI2_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI2_RST);
} else if(spi_num == HSPI) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI3_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI3_RST);
} else {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI01_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI01_RST);
}
#elif CONFIG_IDF_TARGET_ESP32S3
if(spi_num == FSPI) {
periph_ll_reset( PERIPH_SPI2_MODULE );
periph_ll_enable_clk_clear_rst( PERIPH_SPI2_MODULE );
} else if(spi_num == HSPI) {
periph_ll_reset( PERIPH_SPI3_MODULE );
periph_ll_enable_clk_clear_rst( PERIPH_SPI3_MODULE );
}
#elif CONFIG_IDF_TARGET_ESP32
if(spi_num == HSPI) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI2_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI2_RST);
} else if(spi_num == VSPI) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI3_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI3_RST);
} else {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI01_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI01_RST);
}
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
periph_ll_reset( PERIPH_SPI2_MODULE );
periph_ll_enable_clk_clear_rst( PERIPH_SPI2_MODULE );
#endif
SPI_MUTEX_LOCK();
spiInitBus(spi);
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->clk_gate.clk_en = 1;
spi->dev->clk_gate.mst_clk_sel = 1;
spi->dev->clk_gate.mst_clk_active = 1;
#if !CONFIG_IDF_TARGET_ESP32C6 && !CONFIG_IDF_TARGET_ESP32H2
spi->dev->dma_conf.tx_seg_trans_clr_en = 1;
spi->dev->dma_conf.rx_seg_trans_clr_en = 1;
spi->dev->dma_conf.dma_seg_trans_en = 0;
#endif
#endif
spi->dev->user.usr_mosi = 1;
spi->dev->user.usr_miso = 1;
spi->dev->user.doutdin = 1;
int i;
for(i=0; i<16; i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[i].val = 0x00000000;
#else
spi->dev->data_buf[i] = 0x00000000;
#endif
}
SPI_MUTEX_UNLOCK();
spiSetDataMode(spi, dataMode);
spiSetBitOrder(spi, bitOrder);
spiSetClockDiv(spi, clockDiv);
addApbChangeCallback(spi, _on_apb_change);
return spi;
}
void spiWaitReady(spi_t * spi)
{
if(!spi) {
return;
}
while(spi->dev->cmd.usr);
}
#if CONFIG_IDF_TARGET_ESP32S2
#define usr_mosi_dbitlen usr_mosi_bit_len
#define usr_miso_dbitlen usr_miso_bit_len
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
#define usr_mosi_dbitlen ms_data_bitlen
#define usr_miso_dbitlen ms_data_bitlen
#define mosi_dlen ms_dlen
#define miso_dlen ms_dlen
#endif
void spiWrite(spi_t * spi, const uint32_t *data, uint8_t len)
{
if(!spi) {
return;
}
int i;
if(len > 16) {
len = 16;
}
SPI_MUTEX_LOCK();
spi->dev->mosi_dlen.usr_mosi_dbitlen = (len * 32) - 1;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
#endif
for(i=0; i<len; i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[i].val = data[i];
#else
spi->dev->data_buf[i] = data[i];
#endif
}
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
SPI_MUTEX_UNLOCK();
}
void spiTransfer(spi_t * spi, uint32_t *data, uint8_t len)
{
if(!spi) {
return;
}
int i;
if(len > 16) {
len = 16;
}
SPI_MUTEX_LOCK();
spi->dev->mosi_dlen.usr_mosi_dbitlen = (len * 32) - 1;
spi->dev->miso_dlen.usr_miso_dbitlen = (len * 32) - 1;
for(i=0; i<len; i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[i].val = data[i];
#else
spi->dev->data_buf[i] = data[i];
#endif
}
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
for(i=0; i<len; i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
data[i] = spi->dev->data_buf[i].val;
#else
data[i] = spi->dev->data_buf[i];
#endif
}
SPI_MUTEX_UNLOCK();
}
void spiWriteByte(spi_t * spi, uint8_t data)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
#endif
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
SPI_MUTEX_UNLOCK();
}
uint8_t spiTransferByte(spi_t * spi, uint8_t data)
{
if(!spi) {
return 0;
}
SPI_MUTEX_LOCK();
spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
spi->dev->miso_dlen.usr_miso_dbitlen = 7;
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
data = spi->dev->data_buf[0].val & 0xFF;
#else
data = spi->dev->data_buf[0] & 0xFF;
#endif
SPI_MUTEX_UNLOCK();
return data;
}
static uint32_t __spiTranslate32(uint32_t data)
{
union {
uint32_t l;
uint8_t b[4];
} out;
out.l = data;
return out.b[3] | (out.b[2] << 8) | (out.b[1] << 16) | (out.b[0] << 24);
}
void spiWriteWord(spi_t * spi, uint16_t data)
{
if(!spi) {
return;
}
if(!spi->dev->ctrl.wr_bit_order){
data = (data >> 8) | (data << 8);
}
SPI_MUTEX_LOCK();
spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
#endif
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
SPI_MUTEX_UNLOCK();
}
uint16_t spiTransferWord(spi_t * spi, uint16_t data)
{
if(!spi) {
return 0;
}
if(!spi->dev->ctrl.wr_bit_order){
data = (data >> 8) | (data << 8);
}
SPI_MUTEX_LOCK();
spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
spi->dev->miso_dlen.usr_miso_dbitlen = 15;
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
data = spi->dev->data_buf[0].val;
#else
data = spi->dev->data_buf[0];
#endif
SPI_MUTEX_UNLOCK();
if(!spi->dev->ctrl.rd_bit_order){
data = (data >> 8) | (data << 8);
}
return data;
}
void spiWriteLong(spi_t * spi, uint32_t data)
{
if(!spi) {
return;
}
if(!spi->dev->ctrl.wr_bit_order){
data = __spiTranslate32(data);
}
SPI_MUTEX_LOCK();
spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
#endif
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
SPI_MUTEX_UNLOCK();
}
uint32_t spiTransferLong(spi_t * spi, uint32_t data)
{
if(!spi) {
return 0;
}
if(!spi->dev->ctrl.wr_bit_order){
data = __spiTranslate32(data);
}
SPI_MUTEX_LOCK();
spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
spi->dev->miso_dlen.usr_miso_dbitlen = 31;
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
data = spi->dev->data_buf[0].val;
#else
data = spi->dev->data_buf[0];
#endif
SPI_MUTEX_UNLOCK();
if(!spi->dev->ctrl.rd_bit_order){
data = __spiTranslate32(data);
}
return data;
}
static void __spiTransferBytes(spi_t * spi, const uint8_t * data, uint8_t * out, uint32_t bytes)
{
if(!spi) {
return;
}
uint32_t i;
if(bytes > 64) {
bytes = 64;
}
uint32_t words = (bytes + 3) / 4;//16 max
uint32_t wordsBuf[16] = {0,};
uint8_t * bytesBuf = (uint8_t *) wordsBuf;
if(data) {
memcpy(bytesBuf, data, bytes);//copy data to buffer
} else {
memset(bytesBuf, 0xFF, bytes);
}
spi->dev->mosi_dlen.usr_mosi_dbitlen = ((bytes * 8) - 1);
spi->dev->miso_dlen.usr_miso_dbitlen = ((bytes * 8) - 1);
for(i=0; i<words; i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[i].val = wordsBuf[i]; //copy buffer to spi fifo
#else
spi->dev->data_buf[i] = wordsBuf[i]; //copy buffer to spi fifo
#endif
}
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
if(out) {
for(i=0; i<words; i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
wordsBuf[i] = spi->dev->data_buf[i].val;//copy spi fifo to buffer
#else
wordsBuf[i] = spi->dev->data_buf[i];//copy spi fifo to buffer
#endif
}
memcpy(out, bytesBuf, bytes);//copy buffer to output
}
}
void spiTransferBytes(spi_t * spi, const uint8_t * data, uint8_t * out, uint32_t size)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
while(size) {
if(size > 64) {
__spiTransferBytes(spi, data, out, 64);
size -= 64;
if(data) {
data += 64;
}
if(out) {
out += 64;
}
} else {
__spiTransferBytes(spi, data, out, size);
size = 0;
}
}
SPI_MUTEX_UNLOCK();
}
void spiTransferBits(spi_t * spi, uint32_t data, uint32_t * out, uint8_t bits)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
spiTransferBitsNL(spi, data, out, bits);
SPI_MUTEX_UNLOCK();
}
/*
* Manual Lock Management
* */
#define MSB_32_SET(var, val) { uint8_t * d = (uint8_t *)&(val); (var) = d[3] | (d[2] << 8) | (d[1] << 16) | (d[0] << 24); }
#define MSB_24_SET(var, val) { uint8_t * d = (uint8_t *)&(val); (var) = d[2] | (d[1] << 8) | (d[0] << 16); }
#define MSB_16_SET(var, val) { (var) = (((val) & 0xFF00) >> 8) | (((val) & 0xFF) << 8); }
#define MSB_PIX_SET(var, val) { uint8_t * d = (uint8_t *)&(val); (var) = d[1] | (d[0] << 8) | (d[3] << 16) | (d[2] << 24); }
void spiTransaction(spi_t * spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bitOrder)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
spi->dev->clock.val = clockDiv;
switch (dataMode) {
case SPI_MODE1:
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.ck_idle_edge = 0;
#else
spi->dev->pin.ck_idle_edge = 0;
#endif
spi->dev->user.ck_out_edge = 1;
break;
case SPI_MODE2:
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.ck_idle_edge = 1;
#else
spi->dev->pin.ck_idle_edge = 1;
#endif
spi->dev->user.ck_out_edge = 1;
break;
case SPI_MODE3:
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.ck_idle_edge = 1;
#else
spi->dev->pin.ck_idle_edge = 1;
#endif
spi->dev->user.ck_out_edge = 0;
break;
case SPI_MODE0:
default:
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->misc.ck_idle_edge = 0;
#else
spi->dev->pin.ck_idle_edge = 0;
#endif
spi->dev->user.ck_out_edge = 0;
break;
}
if (SPI_MSBFIRST == bitOrder) {
spi->dev->ctrl.wr_bit_order = 0;
spi->dev->ctrl.rd_bit_order = 0;
} else if (SPI_LSBFIRST == bitOrder) {
spi->dev->ctrl.wr_bit_order = 1;
spi->dev->ctrl.rd_bit_order = 1;
}
}
void spiSimpleTransaction(spi_t * spi)
{
if(!spi) {
return;
}
SPI_MUTEX_LOCK();
}
void spiEndTransaction(spi_t * spi)
{
if(!spi) {
return;
}
SPI_MUTEX_UNLOCK();
}
void ARDUINO_ISR_ATTR spiWriteByteNL(spi_t * spi, uint8_t data)
{
if(!spi) {
return;
}
spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
#endif
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
}
uint8_t spiTransferByteNL(spi_t * spi, uint8_t data)
{
if(!spi) {
return 0;
}
spi->dev->mosi_dlen.usr_mosi_dbitlen = 7;
spi->dev->miso_dlen.usr_miso_dbitlen = 7;
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
data = spi->dev->data_buf[0].val & 0xFF;
#else
data = spi->dev->data_buf[0] & 0xFF;
#endif
return data;
}
void ARDUINO_ISR_ATTR spiWriteShortNL(spi_t * spi, uint16_t data)
{
if(!spi) {
return;
}
if(!spi->dev->ctrl.wr_bit_order){
MSB_16_SET(data, data);
}
spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
#endif
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
}
uint16_t spiTransferShortNL(spi_t * spi, uint16_t data)
{
if(!spi) {
return 0;
}
if(!spi->dev->ctrl.wr_bit_order){
MSB_16_SET(data, data);
}
spi->dev->mosi_dlen.usr_mosi_dbitlen = 15;
spi->dev->miso_dlen.usr_miso_dbitlen = 15;
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
data = spi->dev->data_buf[0].val & 0xFFFF;
#else
data = spi->dev->data_buf[0] & 0xFFFF;
#endif
if(!spi->dev->ctrl.rd_bit_order){
MSB_16_SET(data, data);
}
return data;
}
void ARDUINO_ISR_ATTR spiWriteLongNL(spi_t * spi, uint32_t data)
{
if(!spi) {
return;
}
if(!spi->dev->ctrl.wr_bit_order){
MSB_32_SET(data, data);
}
spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
#endif
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
}
uint32_t spiTransferLongNL(spi_t * spi, uint32_t data)
{
if(!spi) {
return 0;
}
if(!spi->dev->ctrl.wr_bit_order){
MSB_32_SET(data, data);
}
spi->dev->mosi_dlen.usr_mosi_dbitlen = 31;
spi->dev->miso_dlen.usr_miso_dbitlen = 31;
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
data = spi->dev->data_buf[0].val;
#else
data = spi->dev->data_buf[0];
#endif
if(!spi->dev->ctrl.rd_bit_order){
MSB_32_SET(data, data);
}
return data;
}
void spiWriteNL(spi_t * spi, const void * data_in, uint32_t len){
if(!spi) {
return;
}
size_t longs = len >> 2;
if(len & 3){
longs++;
}
uint32_t * data = (uint32_t*)data_in;
size_t c_len = 0, c_longs = 0;
while(len){
c_len = (len>64)?64:len;
c_longs = (longs > 16)?16:longs;
spi->dev->mosi_dlen.usr_mosi_dbitlen = (c_len*8)-1;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
#endif
for (size_t i=0; i<c_longs; i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[i].val = data[i];
#else
spi->dev->data_buf[i] = data[i];
#endif
}
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
data += c_longs;
longs -= c_longs;
len -= c_len;
}
}
void spiTransferBytesNL(spi_t * spi, const void * data_in, uint8_t * data_out, uint32_t len){
if(!spi) {
return;
}
size_t longs = len >> 2;
if(len & 3){
longs++;
}
uint32_t * data = (uint32_t*)data_in;
uint32_t * result = (uint32_t*)data_out;
size_t c_len = 0, c_longs = 0;
while(len){
c_len = (len>64)?64:len;
c_longs = (longs > 16)?16:longs;
spi->dev->mosi_dlen.usr_mosi_dbitlen = (c_len*8)-1;
spi->dev->miso_dlen.usr_miso_dbitlen = (c_len*8)-1;
if(data){
for (size_t i=0; i<c_longs; i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[i].val = data[i];
#else
spi->dev->data_buf[i] = data[i];
#endif
}
} else {
for (size_t i=0; i<c_longs; i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[i].val = 0xFFFFFFFF;
#else
spi->dev->data_buf[i] = 0xFFFFFFFF;
#endif
}
}
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
if(result){
if(c_len & 3){
for (size_t i=0; i<(c_longs-1); i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
result[i] = spi->dev->data_buf[i].val;
#else
result[i] = spi->dev->data_buf[i];
#endif
}
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
uint32_t last_data = spi->dev->data_buf[c_longs-1].val;
#else
uint32_t last_data = spi->dev->data_buf[c_longs-1];
#endif
uint8_t * last_out8 = (uint8_t *)&result[c_longs-1];
uint8_t * last_data8 = (uint8_t *)&last_data;
for (size_t i=0; i<(c_len & 3); i++) {
last_out8[i] = last_data8[i];
}
} else {
for (size_t i=0; i<c_longs; i++) {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
result[i] = spi->dev->data_buf[i].val;
#else
result[i] = spi->dev->data_buf[i];
#endif
}
}
}
if(data){
data += c_longs;
}
if(result){
result += c_longs;
}
longs -= c_longs;
len -= c_len;
}
}
void spiTransferBitsNL(spi_t * spi, uint32_t data, uint32_t * out, uint8_t bits)
{
if(!spi) {
return;
}
if(bits > 32) {
bits = 32;
}
uint32_t bytes = (bits + 7) / 8;//64 max
uint32_t mask = (((uint64_t)1 << bits) - 1) & 0xFFFFFFFF;
data = data & mask;
if(!spi->dev->ctrl.wr_bit_order){
if(bytes == 2) {
MSB_16_SET(data, data);
} else if(bytes == 3) {
MSB_24_SET(data, data);
} else {
MSB_32_SET(data, data);
}
}
spi->dev->mosi_dlen.usr_mosi_dbitlen = (bits - 1);
spi->dev->miso_dlen.usr_miso_dbitlen = (bits - 1);
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[0].val = data;
#else
spi->dev->data_buf[0] = data;
#endif
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
data = spi->dev->data_buf[0].val;
#else
data = spi->dev->data_buf[0];
#endif
if(out) {
*out = data;
if(!spi->dev->ctrl.rd_bit_order){
if(bytes == 2) {
MSB_16_SET(*out, data);
} else if(bytes == 3) {
MSB_24_SET(*out, data);
} else {
MSB_32_SET(*out, data);
}
}
}
}
void ARDUINO_ISR_ATTR spiWritePixelsNL(spi_t * spi, const void * data_in, uint32_t len){
size_t longs = len >> 2;
if(len & 3){
longs++;
}
bool msb = !spi->dev->ctrl.wr_bit_order;
uint32_t * data = (uint32_t*)data_in;
size_t c_len = 0, c_longs = 0, l_bytes = 0;
while(len){
c_len = (len>64)?64:len;
c_longs = (longs > 16)?16:longs;
l_bytes = (c_len & 3);
spi->dev->mosi_dlen.usr_mosi_dbitlen = (c_len*8)-1;
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32
spi->dev->miso_dlen.usr_miso_dbitlen = 0;
#endif
for (size_t i=0; i<c_longs; i++) {
if(msb){
if(l_bytes && i == (c_longs - 1)){
if(l_bytes == 2){
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
MSB_16_SET(spi->dev->data_buf[i].val, data[i]);
#else
MSB_16_SET(spi->dev->data_buf[i], data[i]);
#endif
} else {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[i].val = data[i] & 0xFF;
#else
spi->dev->data_buf[i] = data[i] & 0xFF;
#endif
}
} else {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
MSB_PIX_SET(spi->dev->data_buf[i].val, data[i]);
#else
MSB_PIX_SET(spi->dev->data_buf[i], data[i]);
#endif
}
} else {
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->data_buf[i].val = data[i];
#else
spi->dev->data_buf[i] = data[i];
#endif
}
}
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
spi->dev->cmd.update = 1;
while (spi->dev->cmd.update);
#endif
spi->dev->cmd.usr = 1;
while(spi->dev->cmd.usr);
data += c_longs;
longs -= c_longs;
len -= c_len;
}
}
/*
* Clock Calculators
*
* */
typedef union {
uint32_t value;
struct {
uint32_t clkcnt_l: 6; /*it must be equal to spi_clkcnt_N.*/
uint32_t clkcnt_h: 6; /*it must be floor((spi_clkcnt_N+1)/2-1).*/
uint32_t clkcnt_n: 6; /*it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1)*/
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
uint32_t clkdiv_pre: 4; /*it is pre-divider of spi_clk.*/
uint32_t reserved: 9; /*reserved*/
#else
uint32_t clkdiv_pre: 13; /*it is pre-divider of spi_clk.*/
#endif
uint32_t clk_equ_sysclk: 1; /*1: spi_clk is eqaul to system 0: spi_clk is divided from system clock.*/
};
} spiClk_t;
#define ClkRegToFreq(reg) (apb_freq / (((reg)->clkdiv_pre + 1) * ((reg)->clkcnt_n + 1)))
uint32_t spiClockDivToFrequency(uint32_t clockDiv)
{
uint32_t apb_freq = getApbFrequency();
spiClk_t reg = { clockDiv };
return ClkRegToFreq(&reg);
}
uint32_t spiFrequencyToClockDiv(uint32_t freq)
{
uint32_t apb_freq = getApbFrequency();
if(freq >= apb_freq) {
return SPI_CLK_EQU_SYSCLK;
}
const spiClk_t minFreqReg = { 0x7FFFF000 };
uint32_t minFreq = ClkRegToFreq((spiClk_t*) &minFreqReg);
if(freq < minFreq) {
return minFreqReg.value;
}
uint8_t calN = 1;
spiClk_t bestReg = { 0 };
uint32_t bestFreq = 0;
while(calN <= 0x3F) {
spiClk_t reg = { 0 };
uint32_t calFreq;
int32_t calPre;
int8_t calPreVari = -2;
reg.clkcnt_n = calN;
while(calPreVari++ <= 1) {
calPre = (((apb_freq / (reg.clkcnt_n + 1)) / freq) - 1) + calPreVari;
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
if(calPre > 0xF) {
reg.clkdiv_pre = 0xF;
#else
if(calPre > 0x1FFF) {
reg.clkdiv_pre = 0x1FFF;
#endif
} else if(calPre <= 0) {
reg.clkdiv_pre = 0;
} else {
reg.clkdiv_pre = calPre;
}
reg.clkcnt_l = ((reg.clkcnt_n + 1) / 2);
calFreq = ClkRegToFreq(&reg);
if(calFreq == freq) {
memcpy(&bestReg, &reg, sizeof(bestReg));
break;
} else if(calFreq < freq) {
if((freq - calFreq) < (freq - bestFreq)) {
bestFreq = calFreq;
memcpy(&bestReg, &reg, sizeof(bestReg));
}
}
}
if(calFreq == (int32_t) freq) {
break;
}
calN++;
}
return bestReg.value;
}
#endif /* SOC_GPSPI_SUPPORTED */