mirror of
https://github.com/espressif/arduino-esp32
synced 2024-09-21 02:18:29 +00:00
156 lines
5.4 KiB
C
156 lines
5.4 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef MAIN_ESP32_HAL_SPI_H_
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#define MAIN_ESP32_HAL_SPI_H_
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#include "soc/soc_caps.h"
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#if SOC_GPSPI_SUPPORTED
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "sdkconfig.h"
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#include <stdint.h>
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#include <stdbool.h>
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#define SPI_HAS_TRANSACTION
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#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32S3
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#define FSPI 0
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#define HSPI 1
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define FSPI 1 //SPI 1 bus. ESP32S2: for external memory only (can use the same data lines but different SS)
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#define HSPI 2 //SPI 2 bus. ESP32S2: external memory or device - it can be matrixed to any pins
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#define SPI2 2 // Another name for ESP32S2 SPI 2
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#define SPI3 3 //SPI 3 bus. ESP32S2: device only - it can be matrixed to any pins
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#elif CONFIG_IDF_TARGET_ESP32
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#define FSPI 1 //SPI 1 bus attached to the flash (can use the same data lines but different SS)
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#define HSPI 2 //SPI 2 bus normally mapped to pins 12 - 15, but can be matrixed to any pins
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#define VSPI 3 //SPI 3 bus normally attached to pins 5, 18, 19 and 23, but can be matrixed to any pins
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#endif
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// This defines are not representing the real Divider of the ESP32
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// the Defines match to an AVR Arduino on 16MHz for better compatibility
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#define SPI_CLOCK_DIV2 0x00101001 //8 MHz
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#define SPI_CLOCK_DIV4 0x00241001 //4 MHz
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#define SPI_CLOCK_DIV8 0x004c1001 //2 MHz
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#define SPI_CLOCK_DIV16 0x009c1001 //1 MHz
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#define SPI_CLOCK_DIV32 0x013c1001 //500 KHz
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#define SPI_CLOCK_DIV64 0x027c1001 //250 KHz
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#define SPI_CLOCK_DIV128 0x04fc1001 //125 KHz
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#define SPI_MODE0 0
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#define SPI_MODE1 1
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#define SPI_MODE2 2
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#define SPI_MODE3 3
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#define SPI_SS0 0
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#define SPI_SS1 1
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#define SPI_SS2 2
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#define SPI_SS_MASK_ALL 0x7
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#define SPI_LSBFIRST 0
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#define SPI_MSBFIRST 1
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struct spi_struct_t;
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typedef struct spi_struct_t spi_t;
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spi_t *spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_t bitOrder);
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void spiStopBus(spi_t *spi);
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//Attach/Detach Signal Pins
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bool spiAttachSCK(spi_t *spi, int8_t sck);
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bool spiAttachMISO(spi_t *spi, int8_t miso);
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bool spiAttachMOSI(spi_t *spi, int8_t mosi);
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bool spiDetachSCK(spi_t *spi);
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bool spiDetachMISO(spi_t *spi);
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bool spiDetachMOSI(spi_t *spi);
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//Attach/Detach SS pin to SPI_SSx signal
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bool spiAttachSS(spi_t *spi, uint8_t ss_num, int8_t ss);
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bool spiDetachSS(spi_t *spi);
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//Enable/Disable SPI_SSx pins
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void spiEnableSSPins(spi_t *spi, uint8_t ss_mask);
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void spiDisableSSPins(spi_t *spi, uint8_t ss_mask);
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//Enable/Disable hardware control of SPI_SSx pins
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void spiSSEnable(spi_t *spi);
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void spiSSDisable(spi_t *spi);
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//Activate enabled SPI_SSx pins
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void spiSSSet(spi_t *spi);
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//Deactivate enabled SPI_SSx pins
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void spiSSClear(spi_t *spi);
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void spiWaitReady(spi_t *spi);
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uint32_t spiGetClockDiv(spi_t *spi);
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uint8_t spiGetDataMode(spi_t *spi);
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uint8_t spiGetBitOrder(spi_t *spi);
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/*
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* Non transaction based lock methods (each locks and unlocks when called)
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* */
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void spiSetClockDiv(spi_t *spi, uint32_t clockDiv);
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void spiSetDataMode(spi_t *spi, uint8_t dataMode);
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void spiSetBitOrder(spi_t *spi, uint8_t bitOrder);
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void spiWrite(spi_t *spi, const uint32_t *data, uint8_t len);
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void spiWriteByte(spi_t *spi, uint8_t data);
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void spiWriteWord(spi_t *spi, uint16_t data);
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void spiWriteLong(spi_t *spi, uint32_t data);
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void spiTransfer(spi_t *spi, uint32_t *out, uint8_t len);
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uint8_t spiTransferByte(spi_t *spi, uint8_t data);
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uint16_t spiTransferWord(spi_t *spi, uint16_t data);
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uint32_t spiTransferLong(spi_t *spi, uint32_t data);
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void spiTransferBytes(spi_t *spi, const uint8_t *data, uint8_t *out, uint32_t size);
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void spiTransferBits(spi_t *spi, uint32_t data, uint32_t *out, uint8_t bits);
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/*
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* New (EXPERIMENTAL) Transaction lock based API (lock once until endTransaction)
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* */
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void spiTransaction(spi_t *spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bitOrder);
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void spiSimpleTransaction(spi_t *spi);
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void spiEndTransaction(spi_t *spi);
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void spiWriteNL(spi_t *spi, const void *data_in, uint32_t len);
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void spiWriteByteNL(spi_t *spi, uint8_t data);
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void spiWriteShortNL(spi_t *spi, uint16_t data);
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void spiWriteLongNL(spi_t *spi, uint32_t data);
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void spiWritePixelsNL(spi_t *spi, const void *data_in, uint32_t len);
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#define spiTransferNL(spi, data, len) spiTransferBytesNL(spi, data, data, len)
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uint8_t spiTransferByteNL(spi_t *spi, uint8_t data);
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uint16_t spiTransferShortNL(spi_t *spi, uint16_t data);
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uint32_t spiTransferLongNL(spi_t *spi, uint32_t data);
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void spiTransferBytesNL(spi_t *spi, const void *data_in, uint8_t *data_out, uint32_t len);
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void spiTransferBitsNL(spi_t *spi, uint32_t data_in, uint32_t *data_out, uint8_t bits);
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/*
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* Helper functions to translate frequency to clock divider and back
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* */
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uint32_t spiFrequencyToClockDiv(uint32_t freq);
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uint32_t spiClockDivToFrequency(uint32_t freq);
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#ifdef __cplusplus
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}
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#endif
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#endif /* SOC_GPSPI_SUPPORTED */
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#endif /* MAIN_ESP32_HAL_SPI_H_ */
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