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https://github.com/Bodmer/TFT_eSPI.git
synced 2024-09-21 10:27:11 +00:00
Add ESP32 C3 support
Tested with Stamp C3
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18a76f1c65
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@ -142,7 +142,6 @@ void TFT_eSPI::busDir(uint32_t mask, uint8_t mode)
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pinMode(TFT_D5, mode);
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pinMode(TFT_D6, mode);
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pinMode(TFT_D7, mode);
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return;
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}
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/***************************************************************************************
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@ -144,7 +144,6 @@ void TFT_eSPI::busDir(uint32_t mask, uint8_t mode)
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pinMode(TFT_D5, mode);
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pinMode(TFT_D6, mode);
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pinMode(TFT_D7, mode);
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return;
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}
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/***************************************************************************************
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@ -2,6 +2,8 @@
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// TFT_eSPI driver functions for ESP32 processors //
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////////////////////////////////////////////////////
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// Temporarily a separate file to TFT_eSPI_ESP32.h until board package low level API stabilises
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#ifndef _TFT_eSPI_ESP32H_
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#define _TFT_eSPI_ESP32H_
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@ -22,15 +24,11 @@
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#define VSPI FSPI
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#endif
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// Fix IDF problems with ESP32C3
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#if CONFIG_IDF_TARGET_ESP32C3
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// Fix ESP32C3 IDF bug for missing definition (VSPI/FSPI only tested at the moment)
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#ifndef REG_SPI_BASE
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//Will this work as per S3? #define REG_SPI_BASE(i) (((i)>1) ? (DR_REG_SPI3_BASE) : (DR_REG_SPI2_BASE))
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#define REG_SPI_BASE(i) (DR_REG_SPI1_BASE + (((i)>1) ? (((i)* 0x1000) + 0x20000) : (((~(i)) & 1)* 0x1000 )))
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#define REG_SPI_BASE(i) DR_REG_SPI2_BASE
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#endif
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// Fix ESP32C3 IDF bug for name change
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@ -53,12 +51,12 @@ VSPI = 3, uses SPI3
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ESP32-S2:
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FSPI = 1, uses SPI2
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HSPI = 2, uses SPI3
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VSPI not defined
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VSPI not defined so have made VSPI = HSPI
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ESP32 C3:
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FSPI = 0, uses SPI2 ???? To be checked
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HSPI = 1, uses SPI3 ???? To be checked
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VSPI not defined
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ESP32 C3: Only 1 SPI port available
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FSPI = 1, uses SPI2
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HSPI = 1, uses SPI2
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VSPI not defined so have made VSPI = HSPI
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For ESP32/S2/C3:
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SPI1_HOST = 0
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@ -66,24 +64,8 @@ SPI2_HOST = 1
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SPI3_HOST = 2
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*/
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// ESP32 specific SPI port selection
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#ifdef USE_HSPI_PORT
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#ifdef CONFIG_IDF_TARGET_ESP32
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#define SPI_PORT HSPI //HSPI is port 2 on ESP32
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#else
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#define SPI_PORT 3 //HSPI is port 3 on ESP32 S2
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#endif
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#elif defined(USE_FSPI_PORT)
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#define SPI_PORT 2 //FSPI(ESP32 S2)
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#else
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#ifdef CONFIG_IDF_TARGET_ESP32
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#define SPI_PORT VSPI
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define SPI_PORT 2 //FSPI(ESP32 S2)
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#elif CONFIG_IDF_TARGET_ESP32C3
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#define SPI_PORT FSPI
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#endif
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#endif
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// ESP32 specific SPI port selection - only SPI2_HOST available on C3
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#define SPI_PORT SPI2_HOST
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#ifdef RPI_DISPLAY_TYPE
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#define CMD_BITS (16-1)
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@ -568,13 +550,13 @@ SPI3_HOST = 2
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#define tft_Write_16N(C) *_spi_mosi_dlen = 16-1; \
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*_spi_w = ((C)<<8 | (C)>>8); \
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*_spi_cmd = SPI_USR;
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#else
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#else
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#define tft_Write_16N(C) *_spi_mosi_dlen = 16-1; \
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*_spi_w = ((C)<<8 | (C)>>8); \
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*_spi_cmd = SPI_UPDATE; \
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while (*_spi_cmd & SPI_UPDATE); \
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*_spi_cmd = SPI_USR;
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#endif
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#endif
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// Write 16 bits
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#define tft_Write_16S(C) TFT_WRITE_BITS(C, 16)
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@ -144,7 +144,6 @@ void TFT_eSPI::busDir(uint32_t mask, uint8_t mode)
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pinMode(TFT_D5, mode);
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pinMode(TFT_D6, mode);
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pinMode(TFT_D7, mode);
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return;
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}
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/***************************************************************************************
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@ -16,7 +16,7 @@
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#ifndef _TFT_eSPIH_
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#define _TFT_eSPIH_
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#define TFT_ESPI_VERSION "2.4.60"
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#define TFT_ESPI_VERSION "2.4.61"
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// Bit level feature flags
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// Bit 0 set: viewport capability
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@ -83,7 +83,9 @@
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//#include <User_Setups/Setup61_RP2040_ILI9341_PIO_SPI.h> // Setup file for RP2040 with PIO SPI ILI9341
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//#include <User_Setups/Setup62_RP2040_Nano_Connect_ILI9341.h> // Setup file for RP2040 with SPI ILI9341
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//#include <User_Setups/Setup70_ESP32_S2_ILI9341.h> // Setup file for ESP32 S2 with SPI ILI9341
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//#include <User_Setups/Setup70_ESP32_S2_ILI9341.h> // Setup file for ESP32 S2 with SPI ILI9341
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//#include <User_Setups/Setup70b_ESP32_S3_ILI9341.h> // Setup file for ESP32 S3 with SPI ILI9341
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//#include <User_Setups/Setup70c_ESP32_C3_ILI9341.h> // Setup file for ESP32 C3 with SPI ILI9341
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//#include <User_Setups/Setup71_ESP32_S2_ST7789.h> // Setup file for ESP32 S2 with ST7789
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//#include <User_Setups/Setup72_ESP32_ST7789_172x320.h> // Setup file for ESP32 with ST7789 1.47" 172x320
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56
User_Setups/Setup70c_ESP32_C3_ILI9341.h
Normal file
56
User_Setups/Setup70c_ESP32_C3_ILI9341.h
Normal file
@ -0,0 +1,56 @@
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// Setup for the ESP32 C3 with ILI9341 display
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// Note SPI DMA with ESP32 C3 is not currently supported
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#define USER_SETUP_ID 70
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// See SetupX_Template.h for all options available
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#define ILI9341_DRIVER
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//#define ST7796_DRIVER
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//#define ILI9488_DRIVER
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// Adafruit qtpy default
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//TFT_CS 6
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//TFT_MOSI 7
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//TFT_MISO 8
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//TFT_SCLK 10
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// Lolin C3 mini default
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//TFT_CS 5
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//TFT_MOSI 4
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//TFT_MISO 3
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//TFT_SCLK 2
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//ESP32 C3 generic default
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//TFT_CS 7
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//TFT_MOSI 6
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//TFT_MISO 5
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//TFT_SCLK 4
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#define TFT_CS 7
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#define TFT_MOSI 6
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#define TFT_MISO 5
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#define TFT_SCLK 4
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#define TFT_DC 8
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#define TFT_RST 10
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//#define TOUCH_CS 1 // Optional for touch screen
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#define LOAD_GLCD
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#define LOAD_FONT2
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#define LOAD_FONT4
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#define LOAD_FONT6
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#define LOAD_FONT7
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#define LOAD_FONT8
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#define LOAD_GFXFF
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#define SMOOTH_FONT
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//#define SPI_FREQUENCY 27000000
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#define SPI_FREQUENCY 40000000 // Maximum for ILI9341
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#define SPI_READ_FREQUENCY 6000000 // 6 MHz is the maximum SPI read speed for the ST7789V
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#define SPI_TOUCH_FREQUENCY 2500000
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@ -1,6 +1,6 @@
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{
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"name": "TFT_eSPI",
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"version": "2.4.60",
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"version": "2.4.61",
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"keywords": "Arduino, tft, display, ttgo, LilyPi, WT32-SC01, ePaper, display, Pico, RP2040 Nano Connect, RP2040, STM32, ESP8266, NodeMCU, ESP32, M5Stack, ILI9341, ST7735, ILI9163, S6D02A1, ILI9481, ILI9486, ILI9488, ST7789, ST7796, RM68140, SSD1351, SSD1963, ILI9225, HX8357D, GC9A01, R61581",
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"description": "A TFT and ePaper SPI graphics library with optimisation for Raspberry Pi Pico, RP2040, ESP8266, ESP32 and STM32",
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"repository":
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@ -1,5 +1,5 @@
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name=TFT_eSPI
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version=2.4.60
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version=2.4.61
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author=Bodmer
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maintainer=Bodmer
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sentence=TFT graphics library for Arduino processors with performance optimisation for RP2040, STM32, ESP8266 and ESP32
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