mirror of
https://github.com/Bodmer/TFT_eSPI.git
synced 2024-09-21 02:17:13 +00:00
Various updates
RM68120 support for RP2040 added Various other updates and typo corrections
This commit is contained in:
parent
0bad8c7acc
commit
34850973a0
@ -6,8 +6,8 @@
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// within button
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***************************************************************************************/
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class TFT_eSPI_Button : public TFT_eSPI {
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class TFT_eSPI_Button
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{
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public:
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TFT_eSPI_Button(void);
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// "Classic" initButton() uses centre & size
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@ -375,7 +375,7 @@ void TFT_eSprite::deleteSprite(void)
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if (_colorMap != nullptr)
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{
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free(_colorMap);
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_colorMap = nullptr;
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_colorMap = nullptr;
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}
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if (_created)
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@ -41,11 +41,11 @@
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#endif
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#else
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#ifdef USE_HSPI_PORT
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#define DMA_CHANNEL 2
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spi_host_device_t spi_host = (spi_host_device_t) DMA_CHANNEL; // Draws once then freezes
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#define DMA_CHANNEL SPI_DMA_CH_AUTO
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spi_host_device_t spi_host = (spi_host_device_t) SPI3_HOST; // Draws once then freezes
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#else // use FSPI port
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#define DMA_CHANNEL 1
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spi_host_device_t spi_host = (spi_host_device_t) DMA_CHANNEL; // Draws once then freezes
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#define DMA_CHANNEL SPI_DMA_CH_AUTO
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spi_host_device_t spi_host = (spi_host_device_t) SPI2_HOST; // Draws once then freezes
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#endif
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#endif
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#endif
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@ -767,6 +767,17 @@ void IRAM_ATTR dc_callback(spi_transaction_t *spi_tx)
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else {DC_C;}
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}
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/***************************************************************************************
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** Function name: dma_end_callback
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** Description: Clear DMA run flag to stop retransmission loop
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***************************************************************************************/
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extern "C" void dma_end_callback();
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void IRAM_ATTR dma_end_callback(spi_transaction_t *spi_tx)
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{
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WRITE_PERI_REG(SPI_DMA_CONF_REG(spi_host), 0);
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}
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/***************************************************************************************
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** Function name: initDMA
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** Description: Initialise the DMA engine - returns true if init OK
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@ -782,6 +793,10 @@ bool TFT_eSPI::initDMA(bool ctrl_cs)
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.sclk_io_num = TFT_SCLK,
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.quadwp_io_num = -1,
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.quadhd_io_num = -1,
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.data4_io_num = -1,
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.data5_io_num = -1,
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.data6_io_num = -1,
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.data7_io_num = -1,
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.max_transfer_sz = TFT_WIDTH * TFT_HEIGHT * 2 + 8, // TFT screen size
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.flags = 0,
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.intr_flags = 0
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@ -804,7 +819,11 @@ bool TFT_eSPI::initDMA(bool ctrl_cs)
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.flags = SPI_DEVICE_NO_DUMMY, //0,
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.queue_size = 1,
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.pre_cb = 0, //dc_callback, //Callback to handle D/C line
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.post_cb = 0
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#ifdef CONFIG_IDF_TARGET_ESP32
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.post_cb = 0
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#else
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.post_cb = dma_end_callback
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#endif
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};
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ret = spi_bus_initialize(spi_host, &buscfg, DMA_CHANNEL);
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ESP_ERROR_CHECK(ret);
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@ -165,8 +165,13 @@
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#define DC_C WAIT_FOR_STALL; \
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tft_pio->sm[pio_sm].instr = pio_instr_clr_dc
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// Flush has happened before this and mode changed back to 16 bit
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#define DC_D tft_pio->sm[pio_sm].instr = pio_instr_set_dc
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#ifndef RM68120_DRIVER
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// Flush has happened before this and mode changed back to 16 bit
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#define DC_D tft_pio->sm[pio_sm].instr = pio_instr_set_dc
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#else
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// Need to wait for stall since RM68120 commands are 16 bit
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#define DC_D WAIT_FOR_STALL; tft_pio->sm[pio_sm].instr = pio_instr_set_dc
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#endif
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#endif
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#endif
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@ -14,24 +14,26 @@
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#define TFT_INIT_DELAY 0x80 // Not used unless commandlist invoked
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// Generic commands used by TFT_eSPI.cpp
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#define TFT_NOP 0x0000
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#define TFT_SWRST 0x0100
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#define TFT_NOP 0x0000
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#define TFT_SWRST 0x0100
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#define TFT_CASET 0x2A00
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#define TFT_PASET 0x2B00
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#define TFT_RAMWR 0x2C00
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#define TFT_CASET 0x2A00
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#define TFT_PASET 0x2B00
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#define TFT_RAMWR 0x2C00
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#define TFT_RAMRD 0x2E00
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#define TFT_IDXRD 0xDD00 // ILI9341 only, indexed control register read
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#define TFT_RAMRD 0x2E00
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#define TFT_IDXRD 0xDD00 // ILI9341 only, indexed control register read
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#define TFT_MADCTL 0x3600
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#define TFT_MAD_MY 0x80
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#define TFT_MAD_MX 0x40
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#define TFT_MAD_MV 0x20
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#define TFT_MAD_ML 0x10
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#define TFT_MAD_BGR 0x08
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#define TFT_MAD_MH 0x04
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#define TFT_MAD_RGB 0x00
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#define TFT_MADCTL 0x3600
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#define TFT_MAD_MY 0x80
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#define TFT_MAD_MX 0x40
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#define TFT_MAD_MV 0x20
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#define TFT_MAD_ML 0x10
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#define TFT_MAD_BGR 0x08
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#define TFT_MAD_RGB 0x00
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#define TFT_MAD_MH 0x04
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#define TFT_MAD_H_FLIP 0x02
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#define TFT_MAD_V_FLIP 0x01
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#ifdef TFT_RGB_ORDER
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#if (TFT_RGB_ORDER == 1)
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@ -1,423 +1,263 @@
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// Initialisation for RM68120
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writeRegister(0xF000, 0x55);
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writeRegister(0xF001, 0xAA);
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writeRegister(0xF002, 0x52);
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writeRegister(0xF003, 0x08);
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writeRegister(0xF004, 0x01);
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//ENABLE PAGE 1
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writeRegister8(0xF000, 0x55);
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writeRegister8(0xF001, 0xAA);
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writeRegister8(0xF002, 0x52);
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writeRegister8(0xF003, 0x08);
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writeRegister8(0xF004, 0x01);
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//GAMMA SETING RED
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writeRegister(0xD100, 0x00);
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writeRegister(0xD101, 0x00);
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writeRegister(0xD102, 0x1b);
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writeRegister(0xD103, 0x44);
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writeRegister(0xD104, 0x62);
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writeRegister(0xD105, 0x00);
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writeRegister(0xD106, 0x7b);
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writeRegister(0xD107, 0xa1);
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writeRegister(0xD108, 0xc0);
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writeRegister(0xD109, 0xee);
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writeRegister(0xD10A, 0x55);
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writeRegister(0xD10B, 0x10);
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writeRegister(0xD10C, 0x2c);
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writeRegister(0xD10D, 0x43);
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writeRegister(0xD10E, 0x57);
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writeRegister(0xD10F, 0x55);
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writeRegister(0xD110, 0x68);
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writeRegister(0xD111, 0x78);
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writeRegister(0xD112, 0x87);
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writeRegister(0xD113, 0x94);
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writeRegister(0xD114, 0x55);
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writeRegister(0xD115, 0xa0);
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writeRegister(0xD116, 0xac);
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writeRegister(0xD117, 0xb6);
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writeRegister(0xD118, 0xc1);
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writeRegister(0xD119, 0x55);
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writeRegister(0xD11A, 0xcb);
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writeRegister(0xD11B, 0xcd);
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writeRegister(0xD11C, 0xd6);
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writeRegister(0xD11D, 0xdf);
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writeRegister(0xD11E, 0x95);
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writeRegister(0xD11F, 0xe8);
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writeRegister(0xD120, 0xf1);
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writeRegister(0xD121, 0xfa);
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writeRegister(0xD122, 0x02);
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writeRegister(0xD123, 0xaa);
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writeRegister(0xD124, 0x0b);
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writeRegister(0xD125, 0x13);
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writeRegister(0xD126, 0x1d);
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writeRegister(0xD127, 0x26);
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writeRegister(0xD128, 0xaa);
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writeRegister(0xD129, 0x30);
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writeRegister(0xD12A, 0x3c);
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writeRegister(0xD12B, 0x4A);
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writeRegister(0xD12C, 0x63);
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writeRegister(0xD12D, 0xea);
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writeRegister(0xD12E, 0x79);
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writeRegister(0xD12F, 0xa6);
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writeRegister(0xD130, 0xd0);
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writeRegister(0xD131, 0x20);
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writeRegister(0xD132, 0x0f);
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writeRegister(0xD133, 0x8e);
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writeRegister(0xD134, 0xff);
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//GAMMA SETING GREEN
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writeRegister(0xD200, 0x00);
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writeRegister(0xD201, 0x00);
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writeRegister(0xD202, 0x1b);
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writeRegister(0xD203, 0x44);
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writeRegister(0xD204, 0x62);
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writeRegister(0xD205, 0x00);
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writeRegister(0xD206, 0x7b);
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writeRegister(0xD207, 0xa1);
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writeRegister(0xD208, 0xc0);
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writeRegister(0xD209, 0xee);
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writeRegister(0xD20A, 0x55);
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writeRegister(0xD20B, 0x10);
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writeRegister(0xD20C, 0x2c);
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writeRegister(0xD20D, 0x43);
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writeRegister(0xD20E, 0x57);
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writeRegister(0xD20F, 0x55);
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writeRegister(0xD210, 0x68);
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writeRegister(0xD211, 0x78);
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writeRegister(0xD212, 0x87);
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writeRegister(0xD213, 0x94);
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writeRegister(0xD214, 0x55);
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writeRegister(0xD215, 0xa0);
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writeRegister(0xD216, 0xac);
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writeRegister(0xD217, 0xb6);
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writeRegister(0xD218, 0xc1);
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writeRegister(0xD219, 0x55);
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writeRegister(0xD21A, 0xcb);
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writeRegister(0xD21B, 0xcd);
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writeRegister(0xD21C, 0xd6);
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writeRegister(0xD21D, 0xdf);
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writeRegister(0xD21E, 0x95);
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writeRegister(0xD21F, 0xe8);
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writeRegister(0xD220, 0xf1);
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writeRegister(0xD221, 0xfa);
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writeRegister(0xD222, 0x02);
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writeRegister(0xD223, 0xaa);
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writeRegister(0xD224, 0x0b);
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writeRegister(0xD225, 0x13);
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writeRegister(0xD226, 0x1d);
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writeRegister(0xD227, 0x26);
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writeRegister(0xD228, 0xaa);
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writeRegister(0xD229, 0x30);
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writeRegister(0xD22A, 0x3c);
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writeRegister(0xD22B, 0x4a);
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writeRegister(0xD22C, 0x63);
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writeRegister(0xD22D, 0xea);
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writeRegister(0xD22E, 0x79);
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writeRegister(0xD22F, 0xa6);
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writeRegister(0xD230, 0xd0);
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writeRegister(0xD231, 0x20);
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writeRegister(0xD232, 0x0f);
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writeRegister(0xD233, 0x8e);
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writeRegister(0xD234, 0xff);
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//GAMMA SETING BLUE
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writeRegister(0xD300, 0x00);
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writeRegister(0xD301, 0x00);
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writeRegister(0xD302, 0x1b);
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writeRegister(0xD303, 0x44);
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writeRegister(0xD304, 0x62);
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writeRegister(0xD305, 0x00);
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writeRegister(0xD306, 0x7b);
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writeRegister(0xD307, 0xa1);
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writeRegister(0xD308, 0xc0);
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writeRegister(0xD309, 0xee);
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writeRegister(0xD30A, 0x55);
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writeRegister(0xD30B, 0x10);
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writeRegister(0xD30C, 0x2c);
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writeRegister(0xD30D, 0x43);
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writeRegister(0xD30E, 0x57);
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writeRegister(0xD30F, 0x55);
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writeRegister(0xD310, 0x68);
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writeRegister(0xD311, 0x78);
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writeRegister(0xD312, 0x87);
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writeRegister(0xD313, 0x94);
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writeRegister(0xD314, 0x55);
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writeRegister(0xD315, 0xa0);
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writeRegister(0xD316, 0xac);
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writeRegister(0xD317, 0xb6);
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writeRegister(0xD318, 0xc1);
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writeRegister(0xD319, 0x55);
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writeRegister(0xD31A, 0xcb);
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writeRegister(0xD31B, 0xcd);
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writeRegister(0xD31C, 0xd6);
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writeRegister(0xD31D, 0xdf);
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writeRegister(0xD31E, 0x95);
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writeRegister(0xD31F, 0xe8);
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writeRegister(0xD320, 0xf1);
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writeRegister(0xD321, 0xfa);
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writeRegister(0xD322, 0x02);
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writeRegister(0xD323, 0xaa);
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writeRegister(0xD324, 0x0b);
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writeRegister(0xD325, 0x13);
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writeRegister(0xD326, 0x1d);
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writeRegister(0xD327, 0x26);
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writeRegister(0xD328, 0xaa);
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writeRegister(0xD329, 0x30);
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writeRegister(0xD32A, 0x3c);
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writeRegister(0xD32B, 0x4A);
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writeRegister(0xD32C, 0x63);
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writeRegister(0xD32D, 0xea);
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writeRegister(0xD32E, 0x79);
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writeRegister(0xD32F, 0xa6);
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writeRegister(0xD330, 0xd0);
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writeRegister(0xD331, 0x20);
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writeRegister(0xD332, 0x0f);
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writeRegister(0xD333, 0x8e);
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writeRegister(0xD334, 0xff);
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//GAMMA SETING RED
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writeRegister(0xD400, 0x00);
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writeRegister(0xD401, 0x00);
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writeRegister(0xD402, 0x1b);
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writeRegister(0xD403, 0x44);
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writeRegister(0xD404, 0x62);
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writeRegister(0xD405, 0x00);
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writeRegister(0xD406, 0x7b);
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writeRegister(0xD407, 0xa1);
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writeRegister(0xD408, 0xc0);
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writeRegister(0xD409, 0xee);
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writeRegister(0xD40A, 0x55);
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writeRegister(0xD40B, 0x10);
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writeRegister(0xD40C, 0x2c);
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writeRegister(0xD40D, 0x43);
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writeRegister(0xD40E, 0x57);
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writeRegister(0xD40F, 0x55);
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writeRegister(0xD410, 0x68);
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writeRegister(0xD411, 0x78);
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writeRegister(0xD412, 0x87);
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writeRegister(0xD413, 0x94);
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writeRegister(0xD414, 0x55);
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writeRegister(0xD415, 0xa0);
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writeRegister(0xD416, 0xac);
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writeRegister(0xD417, 0xb6);
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writeRegister(0xD418, 0xc1);
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writeRegister(0xD419, 0x55);
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writeRegister(0xD41A, 0xcb);
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writeRegister(0xD41B, 0xcd);
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writeRegister(0xD41C, 0xd6);
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writeRegister(0xD41D, 0xdf);
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writeRegister(0xD41E, 0x95);
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writeRegister(0xD41F, 0xe8);
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writeRegister(0xD420, 0xf1);
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writeRegister(0xD421, 0xfa);
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writeRegister(0xD422, 0x02);
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writeRegister(0xD423, 0xaa);
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writeRegister(0xD424, 0x0b);
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writeRegister(0xD425, 0x13);
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writeRegister(0xD426, 0x1d);
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writeRegister(0xD427, 0x26);
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writeRegister(0xD428, 0xaa);
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writeRegister(0xD429, 0x30);
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writeRegister(0xD42A, 0x3c);
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writeRegister(0xD42B, 0x4A);
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writeRegister(0xD42C, 0x63);
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writeRegister(0xD42D, 0xea);
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writeRegister(0xD42E, 0x79);
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writeRegister(0xD42F, 0xa6);
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writeRegister(0xD430, 0xd0);
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writeRegister(0xD431, 0x20);
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writeRegister(0xD432, 0x0f);
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writeRegister(0xD433, 0x8e);
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writeRegister(0xD434, 0xff);
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writeRegister8(0xD400, 0x00);
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writeRegister8(0xD401, 0x00);
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writeRegister8(0xD402, 0x1b);
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writeRegister8(0xD403, 0x44);
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writeRegister8(0xD404, 0x62);
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writeRegister8(0xD405, 0x00);
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writeRegister8(0xD406, 0x7b);
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writeRegister8(0xD407, 0xa1);
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writeRegister8(0xD408, 0xc0);
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writeRegister8(0xD409, 0xee);
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writeRegister8(0xD40A, 0x55);
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writeRegister8(0xD40B, 0x10);
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writeRegister8(0xD40C, 0x2c);
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writeRegister8(0xD40D, 0x43);
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writeRegister8(0xD40E, 0x57);
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writeRegister8(0xD40F, 0x55);
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writeRegister8(0xD410, 0x68);
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writeRegister8(0xD411, 0x78);
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writeRegister8(0xD412, 0x87);
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writeRegister8(0xD413, 0x94);
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writeRegister8(0xD414, 0x55);
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writeRegister8(0xD415, 0xa0);
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writeRegister8(0xD416, 0xac);
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writeRegister8(0xD417, 0xb6);
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writeRegister8(0xD418, 0xc1);
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writeRegister8(0xD419, 0x55);
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writeRegister8(0xD41A, 0xcb);
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writeRegister8(0xD41B, 0xcd);
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writeRegister8(0xD41C, 0xd6);
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writeRegister8(0xD41D, 0xdf);
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writeRegister8(0xD41E, 0x95);
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writeRegister8(0xD41F, 0xe8);
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writeRegister8(0xD420, 0xf1);
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writeRegister8(0xD421, 0xfa);
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writeRegister8(0xD422, 0x02);
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writeRegister8(0xD423, 0xaa);
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writeRegister8(0xD424, 0x0b);
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||||
writeRegister8(0xD425, 0x13);
|
||||
writeRegister8(0xD426, 0x1d);
|
||||
writeRegister8(0xD427, 0x26);
|
||||
writeRegister8(0xD428, 0xaa);
|
||||
writeRegister8(0xD429, 0x30);
|
||||
writeRegister8(0xD42A, 0x3c);
|
||||
writeRegister8(0xD42B, 0x4A);
|
||||
writeRegister8(0xD42C, 0x63);
|
||||
writeRegister8(0xD42D, 0xea);
|
||||
writeRegister8(0xD42E, 0x79);
|
||||
writeRegister8(0xD42F, 0xa6);
|
||||
writeRegister8(0xD430, 0xd0);
|
||||
writeRegister8(0xD431, 0x20);
|
||||
writeRegister8(0xD432, 0x0f);
|
||||
writeRegister8(0xD433, 0x8e);
|
||||
writeRegister8(0xD434, 0xff);
|
||||
|
||||
//GAMMA SETING GREEN
|
||||
writeRegister(0xD500, 0x00);
|
||||
writeRegister(0xD501, 0x00);
|
||||
writeRegister(0xD502, 0x1b);
|
||||
writeRegister(0xD503, 0x44);
|
||||
writeRegister(0xD504, 0x62);
|
||||
writeRegister(0xD505, 0x00);
|
||||
writeRegister(0xD506, 0x7b);
|
||||
writeRegister(0xD507, 0xa1);
|
||||
writeRegister(0xD508, 0xc0);
|
||||
writeRegister(0xD509, 0xee);
|
||||
writeRegister(0xD50A, 0x55);
|
||||
writeRegister(0xD50B, 0x10);
|
||||
writeRegister(0xD50C, 0x2c);
|
||||
writeRegister(0xD50D, 0x43);
|
||||
writeRegister(0xD50E, 0x57);
|
||||
writeRegister(0xD50F, 0x55);
|
||||
writeRegister(0xD510, 0x68);
|
||||
writeRegister(0xD511, 0x78);
|
||||
writeRegister(0xD512, 0x87);
|
||||
writeRegister(0xD513, 0x94);
|
||||
writeRegister(0xD514, 0x55);
|
||||
writeRegister(0xD515, 0xa0);
|
||||
writeRegister(0xD516, 0xac);
|
||||
writeRegister(0xD517, 0xb6);
|
||||
writeRegister(0xD518, 0xc1);
|
||||
writeRegister(0xD519, 0x55);
|
||||
writeRegister(0xD51A, 0xcb);
|
||||
writeRegister(0xD51B, 0xcd);
|
||||
writeRegister(0xD51C, 0xd6);
|
||||
writeRegister(0xD51D, 0xdf);
|
||||
writeRegister(0xD51E, 0x95);
|
||||
writeRegister(0xD51F, 0xe8);
|
||||
writeRegister(0xD520, 0xf1);
|
||||
writeRegister(0xD521, 0xfa);
|
||||
writeRegister(0xD522, 0x02);
|
||||
writeRegister(0xD523, 0xaa);
|
||||
writeRegister(0xD524, 0x0b);
|
||||
writeRegister(0xD525, 0x13);
|
||||
writeRegister(0xD526, 0x1d);
|
||||
writeRegister(0xD527, 0x26);
|
||||
writeRegister(0xD528, 0xaa);
|
||||
writeRegister(0xD529, 0x30);
|
||||
writeRegister(0xD52A, 0x3c);
|
||||
writeRegister(0xD52B, 0x4a);
|
||||
writeRegister(0xD52C, 0x63);
|
||||
writeRegister(0xD52D, 0xea);
|
||||
writeRegister(0xD52E, 0x79);
|
||||
writeRegister(0xD52F, 0xa6);
|
||||
writeRegister(0xD530, 0xd0);
|
||||
writeRegister(0xD531, 0x20);
|
||||
writeRegister(0xD532, 0x0f);
|
||||
writeRegister(0xD533, 0x8e);
|
||||
writeRegister(0xD534, 0xff);
|
||||
writeRegister8(0xD500, 0x00);
|
||||
writeRegister8(0xD501, 0x00);
|
||||
writeRegister8(0xD502, 0x1b);
|
||||
writeRegister8(0xD503, 0x44);
|
||||
writeRegister8(0xD504, 0x62);
|
||||
writeRegister8(0xD505, 0x00);
|
||||
writeRegister8(0xD506, 0x7b);
|
||||
writeRegister8(0xD507, 0xa1);
|
||||
writeRegister8(0xD508, 0xc0);
|
||||
writeRegister8(0xD509, 0xee);
|
||||
writeRegister8(0xD50A, 0x55);
|
||||
writeRegister8(0xD50B, 0x10);
|
||||
writeRegister8(0xD50C, 0x2c);
|
||||
writeRegister8(0xD50D, 0x43);
|
||||
writeRegister8(0xD50E, 0x57);
|
||||
writeRegister8(0xD50F, 0x55);
|
||||
writeRegister8(0xD510, 0x68);
|
||||
writeRegister8(0xD511, 0x78);
|
||||
writeRegister8(0xD512, 0x87);
|
||||
writeRegister8(0xD513, 0x94);
|
||||
writeRegister8(0xD514, 0x55);
|
||||
writeRegister8(0xD515, 0xa0);
|
||||
writeRegister8(0xD516, 0xac);
|
||||
writeRegister8(0xD517, 0xb6);
|
||||
writeRegister8(0xD518, 0xc1);
|
||||
writeRegister8(0xD519, 0x55);
|
||||
writeRegister8(0xD51A, 0xcb);
|
||||
writeRegister8(0xD51B, 0xcd);
|
||||
writeRegister8(0xD51C, 0xd6);
|
||||
writeRegister8(0xD51D, 0xdf);
|
||||
writeRegister8(0xD51E, 0x95);
|
||||
writeRegister8(0xD51F, 0xe8);
|
||||
writeRegister8(0xD520, 0xf1);
|
||||
writeRegister8(0xD521, 0xfa);
|
||||
writeRegister8(0xD522, 0x02);
|
||||
writeRegister8(0xD523, 0xaa);
|
||||
writeRegister8(0xD524, 0x0b);
|
||||
writeRegister8(0xD525, 0x13);
|
||||
writeRegister8(0xD526, 0x1d);
|
||||
writeRegister8(0xD527, 0x26);
|
||||
writeRegister8(0xD528, 0xaa);
|
||||
writeRegister8(0xD529, 0x30);
|
||||
writeRegister8(0xD52A, 0x3c);
|
||||
writeRegister8(0xD52B, 0x4a);
|
||||
writeRegister8(0xD52C, 0x63);
|
||||
writeRegister8(0xD52D, 0xea);
|
||||
writeRegister8(0xD52E, 0x79);
|
||||
writeRegister8(0xD52F, 0xa6);
|
||||
writeRegister8(0xD530, 0xd0);
|
||||
writeRegister8(0xD531, 0x20);
|
||||
writeRegister8(0xD532, 0x0f);
|
||||
writeRegister8(0xD533, 0x8e);
|
||||
writeRegister8(0xD534, 0xff);
|
||||
|
||||
//GAMMA SETING BLUE
|
||||
writeRegister(0xD600, 0x00);
|
||||
writeRegister(0xD601, 0x00);
|
||||
writeRegister(0xD602, 0x1b);
|
||||
writeRegister(0xD603, 0x44);
|
||||
writeRegister(0xD604, 0x62);
|
||||
writeRegister(0xD605, 0x00);
|
||||
writeRegister(0xD606, 0x7b);
|
||||
writeRegister(0xD607, 0xa1);
|
||||
writeRegister(0xD608, 0xc0);
|
||||
writeRegister(0xD609, 0xee);
|
||||
writeRegister(0xD60A, 0x55);
|
||||
writeRegister(0xD60B, 0x10);
|
||||
writeRegister(0xD60C, 0x2c);
|
||||
writeRegister(0xD60D, 0x43);
|
||||
writeRegister(0xD60E, 0x57);
|
||||
writeRegister(0xD60F, 0x55);
|
||||
writeRegister(0xD610, 0x68);
|
||||
writeRegister(0xD611, 0x78);
|
||||
writeRegister(0xD612, 0x87);
|
||||
writeRegister(0xD613, 0x94);
|
||||
writeRegister(0xD614, 0x55);
|
||||
writeRegister(0xD615, 0xa0);
|
||||
writeRegister(0xD616, 0xac);
|
||||
writeRegister(0xD617, 0xb6);
|
||||
writeRegister(0xD618, 0xc1);
|
||||
writeRegister(0xD619, 0x55);
|
||||
writeRegister(0xD61A, 0xcb);
|
||||
writeRegister(0xD61B, 0xcd);
|
||||
writeRegister(0xD61C, 0xd6);
|
||||
writeRegister(0xD61D, 0xdf);
|
||||
writeRegister(0xD61E, 0x95);
|
||||
writeRegister(0xD61F, 0xe8);
|
||||
writeRegister(0xD620, 0xf1);
|
||||
writeRegister(0xD621, 0xfa);
|
||||
writeRegister(0xD622, 0x02);
|
||||
writeRegister(0xD623, 0xaa);
|
||||
writeRegister(0xD624, 0x0b);
|
||||
writeRegister(0xD625, 0x13);
|
||||
writeRegister(0xD626, 0x1d);
|
||||
writeRegister(0xD627, 0x26);
|
||||
writeRegister(0xD628, 0xaa);
|
||||
writeRegister(0xD629, 0x30);
|
||||
writeRegister(0xD62A, 0x3c);
|
||||
writeRegister(0xD62B, 0x4A);
|
||||
writeRegister(0xD62C, 0x63);
|
||||
writeRegister(0xD62D, 0xea);
|
||||
writeRegister(0xD62E, 0x79);
|
||||
writeRegister(0xD62F, 0xa6);
|
||||
writeRegister(0xD630, 0xd0);
|
||||
writeRegister(0xD631, 0x20);
|
||||
writeRegister(0xD632, 0x0f);
|
||||
writeRegister(0xD633, 0x8e);
|
||||
writeRegister(0xD634, 0xff);
|
||||
writeRegister8(0xD600, 0x00);
|
||||
writeRegister8(0xD601, 0x00);
|
||||
writeRegister8(0xD602, 0x1b);
|
||||
writeRegister8(0xD603, 0x44);
|
||||
writeRegister8(0xD604, 0x62);
|
||||
writeRegister8(0xD605, 0x00);
|
||||
writeRegister8(0xD606, 0x7b);
|
||||
writeRegister8(0xD607, 0xa1);
|
||||
writeRegister8(0xD608, 0xc0);
|
||||
writeRegister8(0xD609, 0xee);
|
||||
writeRegister8(0xD60A, 0x55);
|
||||
writeRegister8(0xD60B, 0x10);
|
||||
writeRegister8(0xD60C, 0x2c);
|
||||
writeRegister8(0xD60D, 0x43);
|
||||
writeRegister8(0xD60E, 0x57);
|
||||
writeRegister8(0xD60F, 0x55);
|
||||
writeRegister8(0xD610, 0x68);
|
||||
writeRegister8(0xD611, 0x78);
|
||||
writeRegister8(0xD612, 0x87);
|
||||
writeRegister8(0xD613, 0x94);
|
||||
writeRegister8(0xD614, 0x55);
|
||||
writeRegister8(0xD615, 0xa0);
|
||||
writeRegister8(0xD616, 0xac);
|
||||
writeRegister8(0xD617, 0xb6);
|
||||
writeRegister8(0xD618, 0xc1);
|
||||
writeRegister8(0xD619, 0x55);
|
||||
writeRegister8(0xD61A, 0xcb);
|
||||
writeRegister8(0xD61B, 0xcd);
|
||||
writeRegister8(0xD61C, 0xd6);
|
||||
writeRegister8(0xD61D, 0xdf);
|
||||
writeRegister8(0xD61E, 0x95);
|
||||
writeRegister8(0xD61F, 0xe8);
|
||||
writeRegister8(0xD620, 0xf1);
|
||||
writeRegister8(0xD621, 0xfa);
|
||||
writeRegister8(0xD622, 0x02);
|
||||
writeRegister8(0xD623, 0xaa);
|
||||
writeRegister8(0xD624, 0x0b);
|
||||
writeRegister8(0xD625, 0x13);
|
||||
writeRegister8(0xD626, 0x1d);
|
||||
writeRegister8(0xD627, 0x26);
|
||||
writeRegister8(0xD628, 0xaa);
|
||||
writeRegister8(0xD629, 0x30);
|
||||
writeRegister8(0xD62A, 0x3c);
|
||||
writeRegister8(0xD62B, 0x4A);
|
||||
writeRegister8(0xD62C, 0x63);
|
||||
writeRegister8(0xD62D, 0xea);
|
||||
writeRegister8(0xD62E, 0x79);
|
||||
writeRegister8(0xD62F, 0xa6);
|
||||
writeRegister8(0xD630, 0xd0);
|
||||
writeRegister8(0xD631, 0x20);
|
||||
writeRegister8(0xD632, 0x0f);
|
||||
writeRegister8(0xD633, 0x8e);
|
||||
writeRegister8(0xD634, 0xff);
|
||||
|
||||
//AVDD VOLTAGE SETTING
|
||||
writeRegister(0xB000, 0x05);
|
||||
writeRegister(0xB001, 0x05);
|
||||
writeRegister(0xB002, 0x05);
|
||||
writeRegister8(0xB000, 0x05);
|
||||
writeRegister8(0xB001, 0x05);
|
||||
writeRegister8(0xB002, 0x05);
|
||||
//AVEE VOLTAGE SETTING
|
||||
writeRegister(0xB100, 0x05);
|
||||
writeRegister(0xB101, 0x05);
|
||||
writeRegister(0xB102, 0x05);
|
||||
writeRegister8(0xB100, 0x05);
|
||||
writeRegister8(0xB101, 0x05);
|
||||
writeRegister8(0xB102, 0x05);
|
||||
|
||||
//AVDD Boosting
|
||||
writeRegister(0xB600, 0x34);
|
||||
writeRegister(0xB601, 0x34);
|
||||
writeRegister(0xB603, 0x34);
|
||||
writeRegister8(0xB600, 0x34);
|
||||
writeRegister8(0xB601, 0x34);
|
||||
writeRegister8(0xB603, 0x34);
|
||||
//AVEE Boosting
|
||||
writeRegister(0xB700, 0x24);
|
||||
writeRegister(0xB701, 0x24);
|
||||
writeRegister(0xB702, 0x24);
|
||||
writeRegister8(0xB700, 0x24);
|
||||
writeRegister8(0xB701, 0x24);
|
||||
writeRegister8(0xB702, 0x24);
|
||||
//VCL Boosting
|
||||
writeRegister(0xB800, 0x24);
|
||||
writeRegister(0xB801, 0x24);
|
||||
writeRegister(0xB802, 0x24);
|
||||
writeRegister8(0xB800, 0x24);
|
||||
writeRegister8(0xB801, 0x24);
|
||||
writeRegister8(0xB802, 0x24);
|
||||
//VGLX VOLTAGE SETTING
|
||||
writeRegister(0xBA00, 0x14);
|
||||
writeRegister(0xBA01, 0x14);
|
||||
writeRegister(0xBA02, 0x14);
|
||||
writeRegister8(0xBA00, 0x14);
|
||||
writeRegister8(0xBA01, 0x14);
|
||||
writeRegister8(0xBA02, 0x14);
|
||||
//VCL Boosting
|
||||
writeRegister(0xB900, 0x24);
|
||||
writeRegister(0xB901, 0x24);
|
||||
writeRegister(0xB902, 0x24);
|
||||
writeRegister8(0xB900, 0x24);
|
||||
writeRegister8(0xB901, 0x24);
|
||||
writeRegister8(0xB902, 0x24);
|
||||
//Gamma Voltage
|
||||
writeRegister(0xBc00, 0x00);
|
||||
writeRegister(0xBc01, 0xa0);//vgmp=5.0
|
||||
writeRegister(0xBc02, 0x00);
|
||||
writeRegister(0xBd00, 0x00);
|
||||
writeRegister(0xBd01, 0xa0);//vgmn=5.0
|
||||
writeRegister(0xBd02, 0x00);
|
||||
writeRegister8(0xBc00, 0x00);
|
||||
writeRegister8(0xBc01, 0xa0);//vgmp=5.0
|
||||
writeRegister8(0xBc02, 0x00);
|
||||
writeRegister8(0xBd00, 0x00);
|
||||
writeRegister8(0xBd01, 0xa0);//vgmn=5.0
|
||||
writeRegister8(0xBd02, 0x00);
|
||||
//VCOM Setting
|
||||
writeRegister(0xBe01, 0x3d);//3
|
||||
//ENABLE PAGE 0
|
||||
writeRegister(0xF000, 0x55);
|
||||
writeRegister(0xF001, 0xAA);
|
||||
writeRegister(0xF002, 0x52);
|
||||
writeRegister(0xF003, 0x08);
|
||||
writeRegister(0xF004, 0x00);
|
||||
//Vivid Color Function Control
|
||||
writeRegister(0xB400, 0x10);
|
||||
//Z-INVERSION
|
||||
writeRegister(0xBC00, 0x05);
|
||||
writeRegister(0xBC01, 0x05);
|
||||
writeRegister(0xBC02, 0x05);
|
||||
writeRegister8(0xBe01, 0x3d);//3
|
||||
|
||||
//ENABLE PAGE 0
|
||||
writeRegister8(0xF000, 0x55);
|
||||
writeRegister8(0xF001, 0xAA);
|
||||
writeRegister8(0xF002, 0x52);
|
||||
writeRegister8(0xF003, 0x08);
|
||||
writeRegister8(0xF004, 0x00);
|
||||
//Vivid Color Function Control
|
||||
writeRegister8(0xB400, 0x10);
|
||||
//Z-INVERSION
|
||||
writeRegister8(0xBC00, 0x05);
|
||||
writeRegister8(0xBC01, 0x05);
|
||||
writeRegister8(0xBC02, 0x05);
|
||||
//*************** add on 20111021**********************//
|
||||
writeRegister(0xB700, 0x22);//GATE EQ CONTROL
|
||||
writeRegister(0xB701, 0x22);//GATE EQ CONTROL
|
||||
writeRegister(0xC80B, 0x2A);//DISPLAY TIMING CONTROL
|
||||
writeRegister(0xC80C, 0x2A);//DISPLAY TIMING CONTROL
|
||||
writeRegister(0xC80F, 0x2A);//DISPLAY TIMING CONTROL
|
||||
writeRegister(0xC810, 0x2A);//DISPLAY TIMING CONTROL
|
||||
writeRegister8(0xB700, 0x22);//GATE EQ CONTROL
|
||||
writeRegister8(0xB701, 0x22);//GATE EQ CONTROL
|
||||
writeRegister8(0xC80B, 0x2A);//DISPLAY TIMING CONTROL
|
||||
writeRegister8(0xC80C, 0x2A);//DISPLAY TIMING CONTROL
|
||||
writeRegister8(0xC80F, 0x2A);//DISPLAY TIMING CONTROL
|
||||
writeRegister8(0xC810, 0x2A);//DISPLAY TIMING CONTROL
|
||||
//*************** add on 20111021**********************//
|
||||
//PWM_ENH_OE =1
|
||||
writeRegister(0xd000, 0x01);
|
||||
writeRegister8(0xd000, 0x01);
|
||||
//DM_SEL =1
|
||||
writeRegister(0xb300, 0x10);
|
||||
writeRegister8(0xb300, 0x10);
|
||||
//VBPDA=07h
|
||||
writeRegister(0xBd02, 0x07);
|
||||
writeRegister8(0xBd02, 0x07);
|
||||
//VBPDb=07h
|
||||
writeRegister(0xBe02, 0x07);
|
||||
writeRegister8(0xBe02, 0x07);
|
||||
//VBPDc=07h
|
||||
writeRegister(0xBf02, 0x07);
|
||||
writeRegister8(0xBf02, 0x07);
|
||||
|
||||
//ENABLE PAGE 2
|
||||
writeRegister(0xF000, 0x55);
|
||||
writeRegister(0xF001, 0xAA);
|
||||
writeRegister(0xF002, 0x52);
|
||||
writeRegister(0xF003, 0x08);
|
||||
writeRegister(0xF004, 0x02);
|
||||
writeRegister8(0xF000, 0x55);
|
||||
writeRegister8(0xF001, 0xAA);
|
||||
writeRegister8(0xF002, 0x52);
|
||||
writeRegister8(0xF003, 0x08);
|
||||
writeRegister8(0xF004, 0x02);
|
||||
//SDREG0 =0
|
||||
writeRegister(0xc301, 0xa9);
|
||||
writeRegister8(0xc301, 0xa9);
|
||||
//DS=14
|
||||
writeRegister(0xfe01, 0x94);
|
||||
writeRegister8(0xfe01, 0x94);
|
||||
//OSC =60h
|
||||
writeRegister(0xf600, 0x60);
|
||||
writeRegister8(0xf600, 0x60);
|
||||
//TE ON
|
||||
writeRegister(0x3500, 0x00);
|
||||
writeRegister8(0x3500, 0x00);
|
||||
writeRegister8(0xFFFF, 0xFF);
|
||||
|
||||
//SLEEP OUT
|
||||
writecommand(0x1100);
|
||||
delay(100);
|
||||
@ -425,5 +265,5 @@ delay(100);
|
||||
writecommand(0x2900);
|
||||
delay(100);
|
||||
|
||||
writeRegister(0x3A00, 0x55);
|
||||
writeRegister(0x3600, 0xA3);
|
||||
writeRegister16(0x3A00, 0x55);
|
||||
writeRegister8(0x3600, TFT_MAD_COLOR_ORDER);
|
||||
|
@ -2,28 +2,28 @@
|
||||
// This is the command sequence that rotates the RM68120 driver coordinate frame
|
||||
|
||||
rotation = m % 4; // Limit the range of values to 0-3
|
||||
uint8_t reg = 0;
|
||||
|
||||
writecommand(TFT_MADCTL);
|
||||
switch (rotation) {
|
||||
case 0:
|
||||
writedata(TFT_MAD_COLOR_ORDER);
|
||||
reg = TFT_MAD_COLOR_ORDER;
|
||||
_width = _init_width;
|
||||
_height = _init_height;
|
||||
break;
|
||||
case 1:
|
||||
writedata(TFT_MAD_MV | TFT_MAD_MX | TFT_MAD_COLOR_ORDER);
|
||||
reg = TFT_MAD_MV | TFT_MAD_MX | TFT_MAD_COLOR_ORDER;
|
||||
_width = _init_height;
|
||||
_height = _init_width;
|
||||
break;
|
||||
case 2:
|
||||
writedata(TFT_MAD_MX | TFT_MAD_MY | TFT_MAD_COLOR_ORDER);
|
||||
reg = TFT_MAD_MX | TFT_MAD_MY | TFT_MAD_COLOR_ORDER;
|
||||
_width = _init_width;
|
||||
_height = _init_height;
|
||||
break;
|
||||
case 3:
|
||||
writedata(TFT_MAD_MV | TFT_MAD_MY | TFT_MAD_COLOR_ORDER);
|
||||
reg = TFT_MAD_MV | TFT_MAD_MY | TFT_MAD_COLOR_ORDER;
|
||||
_width = _init_height;
|
||||
_height = _init_width;
|
||||
break;
|
||||
|
||||
}
|
||||
writeRegister16(TFT_MADCTL, reg);
|
54
TFT_eSPI.cpp
54
TFT_eSPI.cpp
@ -988,7 +988,6 @@ void TFT_eSPI::writecommand(uint8_t c)
|
||||
DC_D;
|
||||
|
||||
end_tft_write();
|
||||
|
||||
}
|
||||
#else
|
||||
void TFT_eSPI::writecommand(uint16_t c)
|
||||
@ -1004,7 +1003,7 @@ void TFT_eSPI::writecommand(uint16_t c)
|
||||
end_tft_write();
|
||||
|
||||
}
|
||||
void TFT_eSPI::writeRegister(uint16_t c, uint8_t d)
|
||||
void TFT_eSPI::writeRegister8(uint16_t c, uint8_t d)
|
||||
{
|
||||
begin_tft_write();
|
||||
|
||||
@ -1019,6 +1018,22 @@ void TFT_eSPI::writeRegister(uint16_t c, uint8_t d)
|
||||
end_tft_write();
|
||||
|
||||
}
|
||||
void TFT_eSPI::writeRegister16(uint16_t c, uint16_t d)
|
||||
{
|
||||
begin_tft_write();
|
||||
|
||||
DC_C;
|
||||
|
||||
tft_Write_16(c);
|
||||
|
||||
DC_D;
|
||||
|
||||
tft_Write_16(d);
|
||||
|
||||
end_tft_write();
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/***************************************************************************************
|
||||
@ -2074,7 +2089,7 @@ void TFT_eSPI::pushImage(int32_t x, int32_t y, int32_t w, int32_t h, uint8_t *da
|
||||
|
||||
/***************************************************************************************
|
||||
** Function name: pushMaskedImage
|
||||
** Description: Render a 16 bit colour image with a 1bpp mask
|
||||
** Description: Render a 16 bit colour image to TFT with a 1bpp mask
|
||||
***************************************************************************************/
|
||||
// Can be used with a 16bpp sprite and a 1bpp sprite for the mask
|
||||
void TFT_eSPI::pushMaskedImage(int32_t x, int32_t y, int32_t w, int32_t h, uint16_t *img, uint8_t *mask)
|
||||
@ -2143,7 +2158,6 @@ void TFT_eSPI::pushMaskedImage(int32_t x, int32_t y, int32_t w, int32_t h, uint1
|
||||
xp += clearCount;
|
||||
clearCount = 0;
|
||||
pushImage(x + xp, y, setCount, 1, iptr + xp); // pushImage handles clipping
|
||||
//pushImageDMA(x + xp, y, setCount, 1, iptr + xp);
|
||||
xp += setCount;
|
||||
}
|
||||
} while (setCount || mptr < eptr);
|
||||
@ -3438,6 +3452,18 @@ void TFT_eSPI::setWindow(int32_t x0, int32_t y0, int32_t x1, int32_t y1)
|
||||
hw_write_masked(&spi_get_hw(SPI_X)->cr0, (16 - 1) << SPI_SSPCR0_DSS_LSB, SPI_SSPCR0_DSS_BITS);
|
||||
#endif
|
||||
DC_D;
|
||||
#elif defined (RM68120_DRIVER)
|
||||
DC_C; tft_Write_16(TFT_CASET+0); DC_D; tft_Write_16(x0 >> 8);
|
||||
DC_C; tft_Write_16(TFT_CASET+1); DC_D; tft_Write_16(x0 & 0xFF);
|
||||
DC_C; tft_Write_16(TFT_CASET+2); DC_D; tft_Write_16(x1 >> 8);
|
||||
DC_C; tft_Write_16(TFT_CASET+3); DC_D; tft_Write_16(x1 & 0xFF);
|
||||
DC_C; tft_Write_16(TFT_PASET+0); DC_D; tft_Write_16(y0 >> 8);
|
||||
DC_C; tft_Write_16(TFT_PASET+1); DC_D; tft_Write_16(y0 & 0xFF);
|
||||
DC_C; tft_Write_16(TFT_PASET+2); DC_D; tft_Write_16(y1 >> 8);
|
||||
DC_C; tft_Write_16(TFT_PASET+3); DC_D; tft_Write_16(y1 & 0xFF);
|
||||
|
||||
DC_C; tft_Write_16(TFT_RAMWR);
|
||||
DC_D;
|
||||
#else
|
||||
// This is for the RP2040 and PIO interface (SPI or parallel)
|
||||
WAIT_FOR_STALL;
|
||||
@ -3665,6 +3691,24 @@ void TFT_eSPI::drawPixel(int32_t x, int32_t y, uint32_t color)
|
||||
#endif
|
||||
#endif
|
||||
while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
|
||||
#elif defined (RM68120_DRIVER)
|
||||
if (addr_col != x) {
|
||||
DC_C; tft_Write_16(TFT_CASET+0); DC_D; tft_Write_16(x >> 8);
|
||||
DC_C; tft_Write_16(TFT_CASET+1); DC_D; tft_Write_16(x & 0xFF);
|
||||
DC_C; tft_Write_16(TFT_CASET+2); DC_D; tft_Write_16(x >> 8);
|
||||
DC_C; tft_Write_16(TFT_CASET+3); DC_D; tft_Write_16(x & 0xFF);
|
||||
addr_col = x;
|
||||
}
|
||||
if (addr_row != y) {
|
||||
DC_C; tft_Write_16(TFT_PASET+0); DC_D; tft_Write_16(y >> 8);
|
||||
DC_C; tft_Write_16(TFT_PASET+1); DC_D; tft_Write_16(y & 0xFF);
|
||||
DC_C; tft_Write_16(TFT_PASET+2); DC_D; tft_Write_16(y >> 8);
|
||||
DC_C; tft_Write_16(TFT_PASET+3); DC_D; tft_Write_16(y & 0xFF);
|
||||
addr_row = y;
|
||||
}
|
||||
DC_C; tft_Write_16(TFT_RAMWR); DC_D;
|
||||
|
||||
TX_FIFO = color;
|
||||
#else
|
||||
// This is for the RP2040 and PIO interface (SPI or parallel)
|
||||
WAIT_FOR_STALL;
|
||||
@ -3981,7 +4025,7 @@ void TFT_eSPI::drawSmoothArc(int32_t x, int32_t y, int32_t r, int32_t ir, uint32
|
||||
***************************************************************************************/
|
||||
// Compute the fixed point square root of an integer and
|
||||
// return the 8 MS bits of fractional part.
|
||||
// Quicker than sqrt() for processors that do not have and FPU (e.g. RP2040)
|
||||
// Quicker than sqrt() for processors that do not have an FPU (e.g. RP2040)
|
||||
inline uint8_t TFT_eSPI::sqrt_fraction(uint32_t num) {
|
||||
if (num > (0x40000000)) return 0;
|
||||
uint32_t bsh = 0x00004000;
|
||||
|
11
TFT_eSPI.h
11
TFT_eSPI.h
@ -16,7 +16,7 @@
|
||||
#ifndef _TFT_eSPIH_
|
||||
#define _TFT_eSPIH_
|
||||
|
||||
#define TFT_ESPI_VERSION "2.5.21"
|
||||
#define TFT_ESPI_VERSION "2.5.22"
|
||||
|
||||
// Bit level feature flags
|
||||
// Bit 0 set: viewport capability
|
||||
@ -699,11 +699,12 @@ class TFT_eSPI : public Print { friend class TFT_eSprite; // Sprite class has ac
|
||||
|
||||
// Low level read/write
|
||||
void spiwrite(uint8_t); // legacy support only
|
||||
#ifndef RM68120_DRIVER
|
||||
void writecommand(uint8_t c); // Send a command, function resets DC/RS high ready for data
|
||||
#ifdef RM68120_DRIVER
|
||||
void writecommand(uint16_t c); // Send a 16 bit command, function resets DC/RS high ready for data
|
||||
void writeRegister8(uint16_t c, uint8_t d); // Write 8 bit data data to 16 bit command register
|
||||
void writeRegister16(uint16_t c, uint16_t d); // Write 16 bit data data to 16 bit command register
|
||||
#else
|
||||
void writecommand(uint16_t c); // Send a command, function resets DC/RS high ready for data
|
||||
void writeRegister(uint16_t c, uint8_t d); // Write data to 16 bit command register
|
||||
void writecommand(uint8_t c); // Send an 8 bit command, function resets DC/RS high ready for data
|
||||
#endif
|
||||
void writedata(uint8_t d); // Send data with DC/RS set high
|
||||
|
||||
|
@ -8,6 +8,19 @@
|
||||
//#define TFT_PARALLEL_8_BIT
|
||||
#define TFT_PARALLEL_16_BIT
|
||||
|
||||
// The parallel interface write cycle period is derived from a division of the CPU clock
|
||||
// speed so scales with the processor clock. This means that the divider ratio may need
|
||||
// to be increased when overclocking. I may also need to be adjusted dependant on the
|
||||
// display controller type (ILI94341, HX8357C etc). If RP2040_PIO_CLK_DIV is not defined
|
||||
// the library will set default values which may not suit your display.
|
||||
// The display controller data sheet will specify the minimum write cycle period. The
|
||||
// controllers often work reliably for shorter periods, however if the period is too short
|
||||
// the display may not initialise or graphics will become corrupted.
|
||||
// PIO write cycle frequency = (CPU clock/(4 * RP2040_PIO_CLK_DIV))
|
||||
//#define RP2040_PIO_CLK_DIV 1 // 32ns write cycle at 125MHz CPU clock
|
||||
//#define RP2040_PIO_CLK_DIV 2 // 64ns write cycle at 125MHz CPU clock
|
||||
//#define RP2040_PIO_CLK_DIV 3 // 96ns write cycle at 125MHz CPU clock
|
||||
//#define RP2040_PIO_CLK_DIV 4 // 96ns write cycle at 125MHz CPU clock
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////////////////
|
||||
// Display driver type
|
||||
|
@ -1,7 +1,7 @@
|
||||
// See SetupX_Template.h for all options available
|
||||
#define USER_SETUP_ID 13
|
||||
|
||||
#define ESP32_PARALLEL
|
||||
#define TFT_PARALLEL_8_BIT
|
||||
|
||||
|
||||
#define ILI9481_DRIVER
|
||||
|
@ -1,34 +1,9 @@
|
||||
// See SetupX_Template.h for all options available
|
||||
#define USER_SETUP_ID 17
|
||||
|
||||
#define EPD_DRIVER // ePaper driver
|
||||
|
||||
|
||||
// READ THIS READ THIS READ THIS READ THIS READ THIS READ THIS
|
||||
// Install the ePaper library for your own display size and type
|
||||
// from here:
|
||||
// https://github.com/Bodmer/EPD_Libraries
|
||||
|
||||
// Note: Pin allocations for the ePaper signals are defined in
|
||||
// the ePaper library's epdif.h file. There follows the default
|
||||
// pins already included in epdif.h file for the ESP8266:
|
||||
|
||||
///////////////////////////////////////////////////////////////////
|
||||
// For ESP8266 connect as follows: //
|
||||
// Display 3.3V to NodeMCU 3V3 //
|
||||
// Display GND to NodeMCU GND //
|
||||
// //
|
||||
// Display GPIO NodeMCU pin //
|
||||
// BUSY 5 D1 //
|
||||
// RESET 4 D2 //
|
||||
// DC 0 D3 //
|
||||
// CS 2 D4 //
|
||||
// CLK 14 D5 //
|
||||
// D6 (MISO not connected to display) //
|
||||
// DIN 13 D7 //
|
||||
// //
|
||||
///////////////////////////////////////////////////////////////////
|
||||
|
||||
#define TFT_MISO -1
|
||||
#define TFT_MOSI -1
|
||||
#define TFT_SCLK -1
|
||||
#define TFT_RST -1
|
||||
|
||||
#define LOAD_GLCD // Font 1. Original Adafruit 8 pixel font needs ~1820 bytes in FLASH
|
||||
#define LOAD_FONT2 // Font 2. Small 16 pixel high font, needs ~3534 bytes in FLASH, 96 characters
|
||||
|
@ -28,7 +28,7 @@
|
||||
#define TFT_DC 2
|
||||
#define TFT_RST 4
|
||||
#define TFT_CS 15
|
||||
#elif defined(ESP8266)
|
||||
#elif defined (ARDUINO_ARCH_ESP8266)
|
||||
//#define TFT_MOSI PIN_D5 // Can't change
|
||||
//#define TFT_SCLK PIN_D7 // Can't change
|
||||
#define TFT_DC PIN_D3
|
||||
|
63
docs/PlatformIO/rp2040.txt
Normal file
63
docs/PlatformIO/rp2040.txt
Normal file
@ -0,0 +1,63 @@
|
||||
;PlatformIO User notes:
|
||||
|
||||
;It is possible to load settings from the calling program rather than modifying
|
||||
;the library for each project by modifying the "platformio.ini" file.
|
||||
|
||||
;The User_Setup_Select.h file will not load the user setting header files if
|
||||
;USER_SETUP_LOADED is defined.
|
||||
|
||||
;Instead of using #define, use the -D prefix, for example:
|
||||
|
||||
; PlatformIO Project Configuration File
|
||||
;
|
||||
; Build options: build flags, source filter, extra scripting
|
||||
; Upload options: custom port, speed and extra flags
|
||||
; Library options: dependencies, extra library storages
|
||||
;
|
||||
; Please visit documentation for the other options and examples
|
||||
; http://docs.platformio.org/page/projectconf.html
|
||||
|
||||
[env:pico]
|
||||
platform = https://github.com/maxgerhardt/platform-raspberrypi.git
|
||||
board = pico
|
||||
framework = arduino
|
||||
board_build.core = earlephilhower
|
||||
board_build.filesystem_size = 0.5m
|
||||
lib_deps = bodmer/TFT_eSPI@^2.5.21
|
||||
; change microcontroller
|
||||
board_build.mcu = rp2040
|
||||
|
||||
; change MCU frequency
|
||||
board_build.f_cpu = 133000000L
|
||||
|
||||
build_flags =
|
||||
-Os
|
||||
-DUSER_SETUP_LOADED=1
|
||||
; Define the TFT driver, pins etc here:
|
||||
-DTFT_PARALLEL_8_BIT=1
|
||||
-DRM68120_DRIVER=1
|
||||
-DRP2040_PIO_CLK_DIV=1
|
||||
-DTFT_DC=28
|
||||
-DTFT_WR=22
|
||||
-DTFT_RST=2
|
||||
|
||||
-DTFT_D0=6
|
||||
-DTFT_D1=7
|
||||
-DTFT_D2=8
|
||||
-DTFT_D3=9
|
||||
-DTFT_D4=10
|
||||
-DTFT_D5=11
|
||||
-DTFT_D6=12
|
||||
-DTFT_D7=13
|
||||
|
||||
-DTFT_BL=16
|
||||
-DTFT_BACKLIGHT_ON=HIGH
|
||||
|
||||
-DLOAD_GLCD=1
|
||||
-DLOAD_FONT2=1
|
||||
-DLOAD_FONT4=1
|
||||
-DLOAD_FONT6=1
|
||||
-DLOAD_FONT7=1
|
||||
-DLOAD_FONT8=1
|
||||
-DLOAD_GFXFF=1
|
||||
-DSMOOTH_FONT=1
|
@ -1,5 +1,5 @@
|
||||
// This is a test sketch being developed for a new arc based meter widget
|
||||
// The meter grahic is fully anti-aliased to avoid jaggy pixelated edges
|
||||
// The meter graphic is fully anti-aliased to avoid jaggy pixelated edges
|
||||
|
||||
// For this demo randomly sized meters are drawn, cycled and redrawn a random size.
|
||||
// The meter is ramped up and down 0-100 and 100-0, then pauses before a new
|
||||
|
@ -58,25 +58,26 @@ void setup(void) {
|
||||
tft.init();
|
||||
|
||||
tft.fillScreen(TFT_BLACK);
|
||||
|
||||
tft.drawRect(0, 0, tft.width(), tft.height(), TFT_GREEN);
|
||||
|
||||
// Set "cursor" at top left corner of display (0,0) and select font 4
|
||||
tft.setCursor(0, 0, 4);
|
||||
tft.setCursor(0, 4, 4);
|
||||
|
||||
// Set the font colour to be white with a black background
|
||||
tft.setTextColor(TFT_WHITE, TFT_BLACK);
|
||||
tft.setTextColor(TFT_WHITE);
|
||||
|
||||
// We can now plot text on screen using the "print" class
|
||||
tft.println("Initialised default\n");
|
||||
tft.println("White text");
|
||||
tft.println(" Initialised default\n");
|
||||
tft.println(" White text");
|
||||
|
||||
tft.setTextColor(TFT_RED, TFT_BLACK);
|
||||
tft.println("Red text");
|
||||
tft.setTextColor(TFT_RED);
|
||||
tft.println(" Red text");
|
||||
|
||||
tft.setTextColor(TFT_GREEN, TFT_BLACK);
|
||||
tft.println("Green text");
|
||||
tft.setTextColor(TFT_GREEN);
|
||||
tft.println(" Green text");
|
||||
|
||||
tft.setTextColor(TFT_BLUE, TFT_BLACK);
|
||||
tft.println("Blue text");
|
||||
tft.setTextColor(TFT_BLUE);
|
||||
tft.println(" Blue text");
|
||||
|
||||
delay(5000);
|
||||
|
||||
@ -87,22 +88,23 @@ void loop() {
|
||||
tft.invertDisplay( false ); // Where i is true or false
|
||||
|
||||
tft.fillScreen(TFT_BLACK);
|
||||
|
||||
tft.setCursor(0, 0, 4);
|
||||
tft.drawRect(0, 0, tft.width(), tft.height(), TFT_GREEN);
|
||||
|
||||
tft.setTextColor(TFT_WHITE, TFT_BLACK);
|
||||
tft.println("Invert OFF\n");
|
||||
tft.setCursor(0, 4, 4);
|
||||
|
||||
tft.println("White text");
|
||||
tft.setTextColor(TFT_WHITE);
|
||||
tft.println(" Invert OFF\n");
|
||||
|
||||
tft.println(" White text");
|
||||
|
||||
tft.setTextColor(TFT_RED, TFT_BLACK);
|
||||
tft.println("Red text");
|
||||
tft.setTextColor(TFT_RED);
|
||||
tft.println(" Red text");
|
||||
|
||||
tft.setTextColor(TFT_GREEN, TFT_BLACK);
|
||||
tft.println("Green text");
|
||||
tft.setTextColor(TFT_GREEN);
|
||||
tft.println(" Green text");
|
||||
|
||||
tft.setTextColor(TFT_BLUE, TFT_BLACK);
|
||||
tft.println("Blue text");
|
||||
tft.setTextColor(TFT_BLUE);
|
||||
tft.println(" Blue text");
|
||||
|
||||
delay(5000);
|
||||
|
||||
@ -111,22 +113,23 @@ void loop() {
|
||||
tft.invertDisplay( true ); // Where i is true or false
|
||||
|
||||
tft.fillScreen(TFT_BLACK);
|
||||
|
||||
tft.setCursor(0, 0, 4);
|
||||
tft.drawRect(0, 0, tft.width(), tft.height(), TFT_GREEN);
|
||||
|
||||
tft.setTextColor(TFT_WHITE, TFT_BLACK);
|
||||
tft.println("Invert ON\n");
|
||||
tft.setCursor(0, 4, 4);
|
||||
|
||||
tft.println("White text");
|
||||
tft.setTextColor(TFT_WHITE);
|
||||
tft.println(" Invert ON\n");
|
||||
|
||||
tft.println(" White text");
|
||||
|
||||
tft.setTextColor(TFT_RED, TFT_BLACK);
|
||||
tft.println("Red text");
|
||||
tft.setTextColor(TFT_RED);
|
||||
tft.println(" Red text");
|
||||
|
||||
tft.setTextColor(TFT_GREEN, TFT_BLACK);
|
||||
tft.println("Green text");
|
||||
tft.setTextColor(TFT_GREEN);
|
||||
tft.println(" Green text");
|
||||
|
||||
tft.setTextColor(TFT_BLUE, TFT_BLACK);
|
||||
tft.println("Blue text");
|
||||
tft.setTextColor(TFT_BLUE);
|
||||
tft.println(" Blue text");
|
||||
|
||||
delay(5000);
|
||||
}
|
||||
|
@ -184,5 +184,5 @@ int8_t getPinName(int8_t pin)
|
||||
|
||||
if (user.esp == 0x32F) return pin;
|
||||
|
||||
return -1; // Invalid pin
|
||||
return pin; // Invalid pin
|
||||
}
|
||||
|
@ -1,6 +1,6 @@
|
||||
{
|
||||
"name": "TFT_eSPI",
|
||||
"version": "2.5.21",
|
||||
"version": "2.5.22",
|
||||
"keywords": "Arduino, tft, display, ttgo, LilyPi, WT32-SC01, ePaper, display, Pico, RP2040 Nano Connect, RP2040, STM32, ESP8266, NodeMCU, ESP32, M5Stack, ILI9341, ST7735, ILI9163, S6D02A1, ILI9481, ILI9486, ILI9488, ST7789, ST7796, RM68140, SSD1351, SSD1963, ILI9225, HX8357D, GC9A01, R61581",
|
||||
"description": "A TFT and ePaper (SPI or parallel interface) graphics library with optimisation for Raspberry Pi Pico, RP2040, ESP8266, ESP32 and STM32 processors",
|
||||
"repository":
|
||||
|
@ -1,5 +1,5 @@
|
||||
name=TFT_eSPI
|
||||
version=2.5.21
|
||||
version=2.5.22
|
||||
author=Bodmer
|
||||
maintainer=Bodmer
|
||||
sentence=TFT graphics library for Arduino processors with performance optimisation for RP2040, STM32, ESP8266 and ESP32
|
||||
|
@ -105,7 +105,7 @@ and is compatible with the GNU GPL.
|
||||
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvStartvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
|
||||
Software License Agreement (FreeBSD License)
|
||||
|
||||
Copyright (c) 2022 Bodmer (https://github.com/Bodmer)
|
||||
Copyright (c) 2023 Bodmer (https://github.com/Bodmer)
|
||||
|
||||
All rights reserved.
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user